Browse tech roles

DFT SoC Architecture RTL Design Verilog UVM Post-Silicon Validation ATE Python Perl Tcl STA Place & Route Power Optimization Fuse Controller DFT IP Verification Synthesis +12 more Show less

DFT SQL ETL Python C++ Perl Tcl AWS Azure GCP Data Modeling Data Visualization Applied Machine Learning Gen AI distributed database s Data Pipelines EDA +12 more Show less

DFT Silicon Bring-up ATPG MBIST Scan Failure Analysis test-content validation Automated Test Environments Silicon Characterization Yield Learning Engineering Workflows +6 more Show less

DFT BIST Scan Compression ATPG Fault Simulation Python Perl Tcl RTL STA ASIC Design VLSI Silicon Debug ATE ISO26262 CAD +11 more Show less

DFT VLSI Power Analysis Thermal Analysis IR Drop RTL STA ATE SLT Applied ML Gen AI Post-Silicon Debug +7 more Show less

DFT ATPG BIST Scan Compression Fault Modeling Fault Simulation Silicon Bring-up VLSI Scripting Oscilloscope Logic Analyzer SoC GPU RAS DPPM +10 more Show less

DFT Silicon Validation ATE SoC Python Perl Tcl Pre-silicon Validation post silicon bring up Semiconductor Process Technology High-speed Protocols Yield Ramp +7 more Show less

DFT SoC Architecture RTL Design Verification Memory BIST DFX ATE Python Perl Tcl STA Silicon Debug Pattern Generation I1149.1 I1500 I1687 1838 +12 more Show less

DFT SoC Architecture RTL Design Verification Memory BIST DFX ATE Python Perl Tcl STA Silicon Debug Pattern Generation I1149.1 I1500 I1687 1838 +12 more Show less

DFT ATPG BIST Scan Compression Fault Modeling Fault Simulation RTL STA Silicon Debug ATE Python Perl Tcl Post-Silicon Validation Verification +10 more Show less

DFT CMOS IEEE1149.1 IEEE1500 SSN Scan Compression IOBIST Memory BIST ATE Python DDR HBM Failure Analysis LVP Photon Emission Ebeam Probing Advantest 93k EDA Tools Test Pattern Generation Logic Design Verification +14 more Show less

DFT Verification DFT Design RTL Verilog Python Perl TCL JTAG IEEE1500 MBIST Scan Design Verification Random Constraint Verification Simulators Waveform Debugging CPU Architecture +11 more Show less

DFT Verilog System-Verilog Python Perl TCL JTAG MBIST Scan RTL Digital Logic Design Computer Architecture Assertions Simulation Silicon Bringup +10 more Show less

DFT Verification DFT Design Verilog Python Perl TCL JTAG IEEE1500 MBIST Scan RTL Digital Logic Design Random Constraint Verification Simulators Waveform Debugging CPU Architecture +11 more Show less

DFT ASIC Design Verilog VHDL Mentor Tessent TCL Python Perl Shell Scripting JTAG ATPG Scan Compression MBIST LBIST IEEE 1500 +10 more Show less

DFT ATPG Verilog Tessent JTAG MBIST LBIST Perl TCL Linux Scan Compression IEEE 1149.1 Silicon Bring-up ATE Agentic AI +10 more Show less

DFT ATPG ATE VLSI Scan Test RTL Verification Post-Silicon 2.5D/3D ICs Multi-chiplet AI CAD +7 more Show less

DFT VLSI Power Analysis Thermal Analysis IR Drop RTL STA ATE SLT Applied ML Gen AI Post-Silicon Debug EDA +8 more Show less

Static Timing Analysis STA DFT Timing Closure Timing Constraints DFT Logic Serdes iJTAG Scan PD DFX Clocks GPU +8 more Show less

DFT ATPG BIST Fault Modeling Fault Simulation Scan Test Plans Silicon Debug ATE RTL STA Python Perl Tcl CAD Post-Silicon Validation +10 more Show less