CPU DFT Verification Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $150,400–$277,600 / yr
Posted: 40 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $198k

This role $214k

$135k $293k

below market most similar roles pay here above market

This role pays more than 65% of similar roles. Most pay $169,625–$227,300 — the blue band above. At the midpoint, this role pays about $214k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · CPU DFT Verification Engineer

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The CPU DFT Verification Engineer joins the processor verification team to ensure the functionality correctness of DFT logic within a chip design effort. The role involves collaborating with architecture, RTL, and DFT designers to execute test plans, develop testbenches, and debug simulation failures. Key responsibilities include developing coverage monitors, creating Verilog checkers or assertions, and working with the silicon bringup team to develop essential tests. Candidates must possess experience in DFT design, processor verification, and digital logic design. Required technical skills include proficiency in JTAG, IEEE1500, MBIST, and scan methodologies, along with scripting in Python, Perl, or TCL. The position requires deep knowledge of design verification environments, including random constraint verification, and the use of simulators and waveform debugging tools to solve complex design issues.

Skills

DFT Verification DFT Design RTL Verilog Python Perl TCL JTAG IEEE1500 MBIST Scan Design Verification Random Constraint Verification Simulators Waveform Debugging CPU Architecture

What you'll do

Verify the functional correctness of DFT logic with architecture, RTL, and DFT designers.
Execute comprehensive test plans specifically for DFT logic.
Develop testbenches and test cases according to established test plans.
Debug simulation failures to identify and resolve design issues.
Develop coverage monitors and analyze results to ensure all test cases are met.
Create Verilog checkers and assertions to verify design integrity.
Develop tests to support the silicon bring-up effort with the silicon bringup team.

What we're looking for

Minimum BS degree and 3+ years of relevant industry experience.
Experience in DFT design, DFT verification, or processor verification.
Experience with digital logic design, test/debug features, or DFT architecture.
Experience with DFT and structural debug concepts and methodologies including JTAG, IEEE1500, or MBIST and scan.
Experience in scripting with Python, Perl, or TCL.
Master’s degree (preferred).
Understanding of CPU architecture (preferred).
Experience in developing design verification test plans, test benches, and test vectors generation (preferred).

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