Senior DFT Engineer

Nvidia

Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$196,000–$310,500 / yr
Posted
18 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $176k
This role $253k
$115k most similar roles pay here $331k

This role pays more than 97% of similar roles. Most pay $147,250–$205,000 — the shaded band above. At the midpoint, this role pays about $253k versus about $176k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 985 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 971 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior DFT Engineer

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Join NVIDIA's Advanced Technology Group as a Senior DFT Engineer to optimize design tradeoffs for next-generation CMOS technology. You will handle all aspects of testing, from methodology and logic insertion to verification and test pattern generation, ensuring efficient data collection while balancing test time constraints. Collaborate with the team on advanced packaging designs and assist in resolving complex debug issues during product bring-up. Ideal candidates have over 12 years of experience in design for test, expertise in various test architectures like IEEE standards, and proficiency in EDA tools such as Advantest 93k testers. Strong programming skills in Python are essential, along with hands-on knowledge of failure analysis equipment. This role offers a dynamic environment focused on cutting-edge technology challenges that impact global innovation.

Skills

Python IEEE1149.1 IEEE1500 SSN scan compression IOBIST memory BIST ATE test program development DFT EDA tools DDR high speed I/O testing HBM high speed I/O testing Advantest 93k testers LVP failure analysis photon emission probing ebeam probing

What you'll do

  • Responsible for all aspects of testing including methodology, logic insertion, verification, and test pattern generation.
  • Find optimal tradeoffs between test time and data collection to monitor the health of next-generation process nodes.
  • Design and tapeout advanced packaging vehicles as part of the team.
  • Assist in resolving complex debug/FA issues during product bring-up testing.
  • Develop new DFT flows and enhance existing ones for efficient pattern generation.

What we're looking for

  • Over 12 years of design for test (DFT) experience required.
  • Expertise in various test architectures including IEEE standards and scan compression techniques.
  • Extensive knowledge of DFT EDA tools and proficiency in programming languages like Python.
  • Experience in ATE test program development, specification, and bring-up processes.
  • Hands-on skills with failure analysis equipment such as LVP, photon emission, and ebeam probing.

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