Senior DFT Power Methodology Engineer
Nvidia
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How this pay compares to similar roles
This role pays more than 93% of similar roles. Most pay $170,000–$216,250 — the shaded band above. At the midpoint, this role pays about $253k versus about $193k for comparable roles.
Based on 240 similar postings.
Employer
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has 896 open roles on FindRole.
Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.
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At a glance
As a Senior DFT Power Methodology Engineer, you will join the Design-for-X Engineering team to innovate within the DFT Power, Thermal, and Voltage Noise Methodology areas. You will develop groundbreaking low power and thermal solutions for manufacturing tests on complex semiconductor chips, specifically targeting conditions that push the boundaries for datacenter GPUs. Your daily responsibilities include collaborating with multi-functional teams to implement new methodologies for improving chip quality, performing post-silicon data analysis for power architecture, and deploying DFT methodologies using Applied ML and Gen AI solutions. You will also mentor junior engineers on test designs and trade-offs. Required skills include expertise in VLSI areas like timing and voltage noise, experience with Power Analysis, Thermal Analysis, and IR Drop tools, as well as proficiency in statistical tools for data analysis and silicon debug on ATE or SLT platforms.
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