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IC Package Design Technical Team Leader

Cisco

Remote (San Jose, CA) 5 days ago $210,600–$305,100
Actively hiring Posted this week Verified listing Above market
Python Perl TCL shell EDA tools ASIC package design signal integrity power distribution networks SI/PI teams high-speed routing package layout cross-functional collaboration scripting languages VNA analyzers oscilloscopes
Remote
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Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

Austin, TX 11 days ago
Actively hiring
Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM simulation Package design electrical review Substrate design RF Digital High-speed and mixed signal die Package/SIP layout
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Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

Irvine, CA 11 days ago $160,000–$225,000
Actively hiring Competitive pay
Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM Simulation Package Design Electrical Review Substrate Design RFIC ASIC Manufacturing Reviews
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Package Design Engineer - Up to Staff level

Qualcomm

Santa Clara, CA +1 26 days ago $154,000–$252,800
Actively hiring Competitive pay
Cadence_APD SiP High_speed_IO_interfaces IC_packaging_structures Electromagnetic_field_analysis Flip_chip_BGA 2_5D_Interposer 3D_Interposer Cadence_Allegro PCB_Editor Advanced_Package_Designer XtractIM PowerSI HFSS Q3D Calibre_tool Design_Rules_Check High_speed_layout_constraints DDR PCIe UCIE
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