ASIC Package Design Engineer

Broadcom

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CAAustin, TXFort Collins, CO
Salary
$143,800–$230,000 / yr
Employment
Full-time
Posted
8 days ago
Freshness
Confirmed live today
Closes
Apr 17, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $195k
This role $187k
$133k $240k
below market most similar roles pay here above market

This role pays less than 51% of similar roles. Most pay $166,746–$223,000 — the blue band above. At the midpoint, this role pays about $187k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · ASIC Package Design Engineer

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The ASIC Package Design Engineer joins a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. This role involves overall design responsibility for complex flip-chip-BGA packages, specifically focusing on critical structures for SerDes at 448G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Key responsibilities include physical design layout, managing signal integrity, power integrity, manufacturability, reliability, and thermal requirements. The engineer must schedule and track multiple projects while contributing to process automation and documentation. Required skills include experience with flip-chip-BGA package design, Cadence APD or equivalent tools, and potentially Cadence SKILL for Allegro. The work addresses high-speed SerDes and very-high-power delivery needs for industry-leading semiconductor products.

Skills

IC Package Design Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity HBM DDR5 Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout RF Microwave ADC DAC

What you'll do

  • Lead the overall design of ASIC packages, ensuring signal integrity, power integrity, manufacturability, reliability, and thermal performance.
  • Design critical package structures for high-speed components including SerDes, ADC/DAC, DDR, and HBM.
  • Perform physical design and layout for flip-chip BGA packages.
  • Manage project schedules, priorities, and customer interfaces for multiple simultaneous projects.
  • Develop and implement process improvements, automation, and documentation to increase design team efficiency.
  • Coordinate co-design efforts with internal team members and external vendor designers across multiple time zones.

What we're looking for

  • BSEE or similar field degree.
  • 12+ years of experience in flip-chip-BGA package design, including high-speed SerDes.
  • MSEE or similar field degree with 10+ years of work experience.
  • Knowledge of package-level signal integrity and power integrity.
  • Experience with Cadence APD (Allegro Package Designer) or an equivalent tool (preferred).
  • Experience with Cadence SKILL for Allegro or similar design-automation coding (preferred).
  • Ability to work on-site at the Broadcom office 5 days a week.
  • Self-management and organization skills.

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