Package Design Engineer
Broadcom
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Market check
How this pay compares to similar roles
This role pays less than 91% of similar roles. Most pay $166,500–$217,700 — the blue band above. At the midpoint, this role pays about $132k versus about $192k for comparable roles.
Based on 240 similar postings.
Employer
Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software
Broadcom currently has 280 open roles on FindRole.
Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.
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At a glance
The Package Design Engineer joins a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. This role involves overall design responsibility for complex flip-chip-BGA packages, specifically focusing on critical structures for SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Key responsibilities include physical design layout, managing signal integrity, power integrity, manufacturability, reliability, and thermal requirements across multiple projects simultaneously. The engineer will utilize Cadence APD, Allegro Package Designer, and potentially Cadence SKILL for design-automation coding. The position requires collaborating with internal and external vendor designers to solve high-speed SerDes and very-high-power delivery needs while contributing to process development, automation, and documentation for the design team.
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