Package Design Engineer

Broadcom

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
San Jose, CAAustin, TXFort Collins, CO
Salary
$121,900–$195,000 / yr
Posted
42 days ago
Freshness
Confirmed live 2 days ago
Closes
Jan 27, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $173k
This role $158k
$111k most similar roles pay here $219k

This role pays less than 62% of similar roles. Most pay $146,500–$199,199 — the shaded band above. At the midpoint, this role pays about $158k versus about $173k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Package Design Engineer

As a Package Design Engineer, you will join a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. You will take overall design responsibility for complex flip-chip-BGA packages, focusing on critical structures for SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Your daily work involves managing multiple projects simultaneously while addressing signal integrity, power integrity, manufacturability, reliability, and thermal requirements. You will perform physical design layout and contribute to team efficiency through process development and automation. The role requires expertise in flip-chip BGA designs and proficiency with Cadence APD or similar tools. Preferred candidates may also possess experience with Cadence SKILL for Allegro or other design-automation coding to solve complex high-speed power delivery challenges.

What you'll do

  • Perform overall design for ASIC packages including signal integrity, power integrity, manufacturability, reliability, and thermal management.
  • Design critical structures for high-speed components such as SerDes, ADC/DAC, DDR, and HBM.
  • Execute physical layout designs as a foundational component of the engineering process.
  • Manage project timelines, priorities, and tracking across multiple simultaneous projects.
  • Act as the primary point of contact for customer interface and project management.
  • Develop automation, documentation, and process improvements to increase team efficiency.
  • Coordinate with internal teams and external vendors across multiple time zones.

What we're looking for

  • A BSEE or similar degree with 8+ years of experience in flip-chip-BGA package design is required.
  • An MSEE or similar degree with 6+ years of work experience is acceptable.
  • Experience must include high-speed SerDes, signal integrity, and power integrity for ASIC packages.
  • Proficiency in physical design (layout) is a foundational requirement for this role.
  • Experience with Cadence APD (Allegro Package Designer) or an equivalent tool is preferred.
  • One or more years of experience with Cadence SKILL or similar design-automation coding is preferred.
  • Ability to manage multiple projects simultaneously while coordinating with global teams and vendors.
  • Must be able to work on-site at the Broadcom office five days a week.

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