Package Design Engineer

Broadcom

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Jose, CAAustin, TXFort Collins, CO
Salary
$101,000–$162,000 / yr
Employment
Full-time
Posted
26 days ago
Freshness
Confirmed live yesterday
Closes
Jan 27, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $132k
$86k $245k
below market most similar roles pay here above market

This role pays less than 91% of similar roles. Most pay $166,500–$217,700 — the blue band above. At the midpoint, this role pays about $132k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · Package Design Engineer

The Package Design Engineer joins a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. This role involves overall design responsibility for complex flip-chip-BGA packages, specifically focusing on critical structures for SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Key responsibilities include physical design layout, managing signal integrity, power integrity, manufacturability, reliability, and thermal requirements across multiple projects simultaneously. The engineer will utilize Cadence APD, Allegro Package Designer, and potentially Cadence SKILL for design-automation coding. The position requires collaborating with internal and external vendor designers to solve high-speed SerDes and very-high-power delivery needs while contributing to process development, automation, and documentation for the design team.

What you'll do

  • Lead the overall design of ASIC packages, focusing on signal integrity, power integrity, manufacturability, reliability, and thermal performance.
  • Design critical package structures for high-speed components including SerDes, ADC/DAC, DDR, and HBM.
  • Execute physical design and layout tasks as a foundational responsibility for flip-chip BGA packages.
  • Manage project schedules, priorities, and tracking for multiple simultaneous design projects.
  • Serve as the primary project manager and customer interface for assigned design projects.
  • Develop and implement process improvements, automation, and documentation to increase design team efficiency.
  • Coordinate with internal teams and external vendor designers across multiple time zones.

What we're looking for

  • BSEE or similar field degree and 5+ years of experience in flip-chip-BGA package design.
  • MSEE or similar field degree and 3+ years of work experience.
  • Experience in package-level signal integrity and power integrity.
  • Experience with Cadence APD (Allegro Package Designer) or an equivalent tool (preferred).
  • Experience with Cadence SKILL for Allegro or similar design-automation coding (preferred).
  • Ability to work on-site at the Broadcom office 5 days a week.
  • Strong self-management, organization, and project management skills.
  • Ability to collaborate with worldwide teams across multiple time zones.

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