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Generative AI Agentic AI Azure AI Microsoft Fabric Data Architecture Enterprise Architecture Microsoft Azure AI Strategy Infrastructure Responsible AI +5 more Show less

Maximo EAM Enterprise Asset Management Java Python Hybrid Cloud AI Red Hat Cloud +3 more Show less

Maximo EAM Enterprise Asset Management Java Python Hybrid Cloud AI Red Hat Cloud +3 more Show less

Maximo EAM Enterprise Asset Management Java Python Hybrid Cloud AI Red Hat Cloud +3 more Show less

Cadence APD PCB Layout Substrate Layout High-Speed Design Signal Integrity Virtuoso Calibre Valor Constraint Manager HDI Design IC Substrates Package Routing Stack-up Power Distribution CAD Library Databases ASIC Packages +11 more Show less

IC Package Design Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity Thermal Manufacturability Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout HBM DDR5 RF Microwave ADC DAC +14 more Show less

Python C++ VLSI EDA AI ML LLMs Signal Integrity Power Delivery Parasitic Extraction IC Physical Design Data Structures Algorithms Object-Oriented Design Package Design HPC +11 more Show less

Salesforce AI Ops Hybrid Cloud Regression Testing Code Migration Application Monitoring Platform Administration Root Cause Analysis Cloud Red Hat +5 more Show less

IC Package Design Cadence Allegro Mentor Xpedition Python Perl TCL Calibre CAM350 HFSS PowerSI SI/PI) analysis RLGC S-parameters DRC DFM Unix Linux DDR PCIe +14 more Show less

IC Package Design Cadence Allegro Mentor Xpedition Python Perl TCL HFSS PowerSI Calibre CAM350 SI/PI) analysis RLGC S-parameter Modeling Unix Linux DFM DRC DDR PCIe +14 more Show less

IC Package Design Cadence Allegro Mentor Xpedition Python Perl TCL Calibre CAM350 HFSS PowerSI SI/PI) analysis RLGC S-parameters DDR PCIe Unix Linux DRC DFM Tape-out +15 more Show less

IC Package Design SI/PI Cadence Allegro Mentor Xpedition Calibre CAM350 HFSS PowerSI Python Perl TCL Unix Linux RLGC S-parameters DFM DRC DDR PCIe +14 more Show less

IC Package Design SI/PI Cadence Allegro Mentor Xpedition Calibre CAM350 HFSS PowerSI Python Perl TCL Unix Linux RLGC S-parameters DFM DRC DDR PCIe +14 more Show less

IC Package Design Cadence Allegro Mentor Xpedition Calibre CAM350 HFSS PowerSI Python Perl TCL Unix Linux SI/PI RLGC S-parameters DDR PCIe DRC DFM Tape-out +15 more Show less

Salesforce LWC Lightning Web Components APIs Agile Scrum Waterfall System Testing Data Migration Business Analysis CRM Hybrid Cloud AI +8 more Show less

Thermal Modeling CFD System-Technology Co-Optimization (STCO) Electro-thermal Electro-optical SMT Processes Reduced-order Modeling DOE +3 more Show less

Package Design ASIC SerDes HBM DDR5 Signal Integrity Power Integrity DFx Thermal Modeling Automation Project Management Layout Simulations RF Microwave ADC DAC +12 more Show less

ASIC Package Design PCB Design SI/PI high‑speed signaling EDA Tools Python Perl TCL Floorplanning stack‑up definition Tapeout multi‑die systems Interposers Power Delivery +9 more Show less

Semiconductor Packaging Design Package Integration Cadence APD Allegro Signal Integrity Power Integrity Design for Manufacturing NPI Si Floor Plan Package Layout BOM Process & Technology Development reliability, testing +8 more Show less

Semiconductor Packaging Design Cadence APD Allegro Signal Integrity Power Integrity Design for Manufacturing NPI Package Layout Si Floor Plan reliability, testing BOM Process & Technology Development +7 more Show less