Senior Package Layout Engineer, Hardware

Nvidia

Confirmed live today High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CANVORAZWACA
Salary: $136,000–$212,750 / yr
Employment: Full-time
Posted: 11 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k

This role $174k

$124k $247k

below market most similar roles pay here above market

This role pays less than 71% of similar roles. Most pay $167,300–$216,250 — the blue band above. At the midpoint, this role pays about $174k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Package Layout Engineer, Hardware

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The Senior Package Layout Engineer - Hardware joins the Layout team to design and develop sophisticated, detailed layouts of IC substrates for NVIDIA products. Working with the Technical Package Lead and various design teams, the engineer implements high speed and density ASIC packages by performing substrate breakout patterns and optimizing package pinouts. Daily responsibilities include performing package routing, placement, stack-up, reference plane, and power distribution while conducting design feasibility studies for size, cost, and system performance. The role requires proficiency in Cadence APD or SiP tool suites, including Constraint Manager, and familiarity with Virtuoso, Calibre, and Valor. Candidates must possess a B.S. in Electrical Engineering and experience in PCB layout for graphics cards or motherboards, specifically focusing on substrate layout for wire bond and flip chip packages.

Skills

Cadence APD PCB Layout Substrate Layout High-Speed Design Signal Integrity Virtuoso Calibre Valor Constraint Manager HDI Design IC Substrates Package Routing Stack-up Power Distribution CAD Library Databases ASIC Packages

What you'll do

Implement high speed/density ASIC packages and perform substrate breakout patterns.
Optimize package pinout by incorporating system level trade-offs of pin assignments.
Perform package routing, placement, stack-up, reference plane, and power distribution using Cadence tools.
Propose layout design trade-offs to the Technical Package Lead for resolution and implementation.
Conduct design feasibility studies to evaluate package goals for size, cost, and system performance.
Develop symbols and CAD library databases using Cadence APD design tools.
Develop methodologies to improve layout productivity.

What we're looking for

Hold a B.S. in Electrical Engineering or equivalent experience.
Have 5+ years of experience in PCB layout of graphics cards, motherboards, line cards, or related technology.
Have proven experience in substrate layout of wire bond and flip chip packages (preferred).
Have a significant background with Cadence APD or SiP and/or PCB layout tools including Constraint Manager.
Have a solid understanding of high-speed design signal integrity practices.
Experience with HDI designs is a plus (preferred).
Experience with Virtuoso and Calibre is a plus (preferred).
Experience using Valor is helpful (preferred).