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17 of up to 20 (filtered)

Senior ASIC Design Engineer, DFT

Nvidia

Santa Clara, CA 4 days ago $168,000–$264,500
Actively hiring Confirmed live yesterday Posted this week High trust Above market
DFT SoC Architecture RTL Design Verilog UVM Post-Silicon Validation ATE Python Perl Tcl STA Place & Route Power Optimization Fuse Controller DFT IP Verification Synthesis
8+ yrs exp Hybrid

Senior DFT Engineer, Post Silicon

Nvidia

Santa Clara, CA +1 5 days ago $168,000–$264,500
Actively hiring Confirmed live yesterday Posted this week High trust Above market
DFT Silicon Bring-up ATPG MBIST Scan Failure Analysis test-content validation Automated Test Environments Silicon Characterization Yield Learning Engineering Workflows
8+ yrs exp Hybrid

Senior DFT Engineer

Nvidia

Santa Clara, CA 5 days ago $168,000–$264,500
Actively hiring Confirmed live yesterday Posted this week High trust Above market
DFT BIST Scan Compression ATPG Fault Simulation Python Perl Tcl RTL STA ASIC Design VLSI Silicon Debug ATE ISO26262 CAD
8+ yrs exp Hybrid

Senior DFT Power Methodology Engineer

Nvidia

Santa Clara, CA 5 days ago $168,000–$264,500
Actively hiring Confirmed live today Posted this week High trust Above market
DFT VLSI Power Analysis Thermal Analysis IR Drop RTL STA ATE SLT Applied ML Gen AI Post-Silicon Debug
10+ yrs exp

Senior DFT Engineer

Nvidia

Santa Clara, CA 11 days ago $136,000–$218,500
Actively hiring Confirmed live yesterday High trust Competitive pay
DFT ATPG BIST Scan Compression Fault Modeling Fault Simulation Silicon Bring-up VLSI Scripting Oscilloscope Logic Analyzer SoC GPU RAS DPPM
5+ yrs exp

Senior ASIC DFT DV Engineer

Cisco

San Jose, CA +1 13 days ago $167,700–$245,200
Actively hiring Confirmed live today High trust Competitive pay
System Verilog UVM Python TCL Perl Verdi DVE JTAG MBIST DFT Scan Architecture Boundary Scan ATE post silicon validation
7+ yrs exp Hybrid

Senior ASIC DFT DV Engineer

Cisco

San Jose, CA 14 days ago $167,700–$245,200
Actively hiring Confirmed live today High trust Competitive pay
DFT MBIST ATE Verilog Python TCL Perl DVE Verdi SRAM DRAM Synopsys DesignWare SMS TestMax Mentor Graphics Tessent
7+ yrs exp Hybrid

Senior DFT Silicon Validation Engineer

Nvidia

Santa Clara, CA 20 days ago $168,000–$264,500
Actively hiring Confirmed live today Trusted Above market
DFT Silicon Validation ATE SoC Python Perl Tcl Pre-silicon Validation post silicon bring up Semiconductor Process Technology High-speed Protocols Yield Ramp
8+ yrs exp

Senior DFT Methodology Engineer

Nvidia

Santa Clara, CA 21 days ago
Actively hiring Confirmed live yesterday High trust
DFT SoC Architecture RTL Design Verification Memory BIST DFX ATE Python Perl Tcl STA Silicon Debug Pattern Generation I1149.1 I1500 I1687 1838
10+ yrs exp Hybrid

Senior DFT Methodology Engineer

Nvidia

Santa Clara, CA 25 days ago $168,000–$264,500
Actively hiring Confirmed live yesterday Trusted Above market
DFT SoC Architecture RTL Design Verification Memory BIST DFX ATE Python Perl Tcl STA Place-n-Route I1149.1 I1500 I1687 1838 Silicon Debug Pattern Generation
10+ yrs exp Hybrid

Senior DFT Methodology Engineer

Nvidia

Santa Clara, CA 25 days ago
Actively hiring Confirmed live today High trust
DFT SoC Architecture RTL Design Verification Memory BIST DFX ATE Python Perl Tcl STA Silicon Debug Pattern Generation I1149.1 I1500 I1687 1838
10+ yrs exp Hybrid

Senior DFT Engineer

Nvidia

Santa Clara, CA 27 days ago $136,000–$218,500
Actively hiring Confirmed live today Trusted Competitive pay
DFT ATPG BIST Scan Compression Fault Modeling Fault Simulation RTL STA Silicon Debug ATE Python Perl Tcl Post-Silicon Validation Verification
5+ yrs exp Hybrid

Senior DFT Engineer

Nvidia

Santa Clara, CA 27 days ago $196,000–$310,500
Actively hiring Confirmed live yesterday Trusted Above market
DFT CMOS IEEE1149.1 IEEE1500 SSN Scan Compression IOBIST Memory BIST ATE Python DDR HBM Failure Analysis LVP Photon Emission Ebeam Probing Advantest 93k EDA Tools Test Pattern Generation Logic Design Verification
10+ yrs exp Hybrid

Senior DFT Engineer

Nvidia

Santa Clara, CA +1 49 days ago
Actively hiring Confirmed live today Trusted
DFT ATPG ATE VLSI Scan Test RTL Verification Post-Silicon 2.5D/3D ICs Multi-chiplet AI CAD
6+ yrs exp Hybrid

Senior DFT Power Methodology Engineer

Nvidia

Santa Clara, CA 62 days ago
Actively hiring Confirmed live yesterday High trust
DFT VLSI Power Analysis Thermal Analysis IR Drop RTL STA ATE SLT Applied ML Gen AI Post-Silicon Debug EDA
10+ yrs exp

Senior ASIC Timing Engineer, DFT

Nvidia

Santa Clara, CA 77 days ago
Actively hiring Confirmed live today Trusted
Static Timing Analysis STA DFT Timing Closure Timing Constraints DFT Logic Serdes iJTAG Scan PD DFX Clocks GPU
5+ yrs exp