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UVM System Verilog Verilog ASIC Verification SoC Ethernet TCP/IP MAC/PCS Pre-silicon Verification Post-silicon Validation RTL data center infrastructure Silicon Engineering +8 more Show less

ASIC DFT ATE SoC MCM Burn-in FIT Rate MTBF Wafer Level Reliability RFIC Product Engineering +6 more Show less

RTL Design Microarchitecture Verilog System Verilog C++ Python Perl Networking Silicon DPU Silicon Engineering Bus Protocols +6 more Show less

C C++ SystemVerilog Python Perl Ruby FPGA HAPS Xilinx JTAG Logic Analyzers Oscilloscopes UART AMBA AXI AHB APB SPI I2C I3C USB Assembly Linker Scripts Makefile +19 more Show less

PPA Fusion Compiler Innovus PrimeTime StarRC PrimePower RedHawk TCL Python PDK Physical Design Scripting Silicon Engineering Automation +9 more Show less

ASIC SoC Firmware Characterization Data Analysis Debug Tools Productization Methodology Bring-up +3 more Show less

ASIC Ethernet PCIe SerDes Python Oscilloscopes Logic Analyzers BERT Signal Integrity Power Integrity SGMII DDR5 USB 3.x I2C UART SPI MDIO eMMC +13 more Show less

Reliability Physics TDDB BTI HCI SM JEDEC AEC Failure Analysis JMP Memory Circuits Defect Screening +6 more Show less

ATE Teradyne Advantest SERDES DFT DFM JTAG Python Perl Tcl/Tk PCB Design Power Integrity Wafer Sort Statistical Analysis Spotfire JMP +11 more Show less

ATE Teradyne UltraFLEX Advantest DFT STIL WGL SERDES High-Speed I/O MBIST BIST ATPG JTAG IEEE 1149.x PCIe USB Ethernet Signal Integrity Power Integrity Failure Analysis +14 more Show less

Silicon Validation post silicon bringup ASIC GPU Logic Analyzers Oscilloscopes Hardware Software High Performance Computing Deep Learning Characterization ATE Micro-architecture Verification +9 more Show less