Senior Speed Characterization Engineer

What you'll do

• Own silicon speed characterization from first power-on through production sign-off across the full PVT space.
• Correlate pre-silicon timing analysis and critical path predictions to measured silicon data.
• Trace hardware failures to microarchitectural bottlenecks, clocking issues, or unmodeled process corners.
• Drive resolutions for frequency misses and timing violations with architecture and design teams.
• Build AI agents for automated test orchestration, intelligent data pipelines, and analysis flows.
• Provide data-driven analysis to settle technical tradeoffs across architecture, VLSI, ASIC, and firmware teams.
• Develop custom scripts and tools in Python, Perl, or C/C++ to support characterization workflows.

What we're looking for

• BS or MS in Electrical Engineering, Computer Engineering, or Systems Engineering, or equivalent experience.
• 5+ years of hands-on experience with silicon bring-up, post-silicon speed validation, frequency characterization, or timing analysis on real hardware.
• Strong computer architecture fundamentals including pipeline structures, clocking, memory hierarchies, and microarchitectural impacts on frequency and power.
• Depth in static timing analysis, critical path identification, and the ability to reason about timing reports at the block and chip level.
• Proficiency in silicon margining, guard-banding, and PVT/binning dependencies.
• Scripting depth in Python, Perl, or C/C++.
• Experience closing the prediction-to-silicon loop with a precise correlation methodology (preferred).
• Experience tracing frequency misses to specific critical paths or microarchitectural interactions and driving the fix (preferred).