Senior Post-Silicon DDR Characterization Engineer

Arm Holdings

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Quick summary

Work type
On-site
Location
Chandler, AZ
Salary
$161,500–$218,500 / yr
Posted
19 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $194k
This role $190k
$144k most similar roles pay here $235k

This role pays more than 53% of similar roles. Most pay $172,375–$216,250 — the shaded band above. At the midpoint, this role pays about $190k versus about $194k for comparable roles.

Based on 240 similar postings.

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About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 105 open roles on FindRole.

Listed pay typically runs $209,100–$282,900 across 105 roles with salary data.

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At a glance

TL;DR · Senior Post-Silicon DDR Characterization Engineer

As a Senior Post-Silicon DDR Characterization Engineer on the Chandler Characterization team, you will validate and characterize next-generation Arm SoCs to help customers bring products to market. You will focus on DDR/LPDDR memory subsystems by characterizing silicon across process, voltage, temperature, and frequency conditions. Your daily responsibilities include developing system-level stress workloads for Linux and Bare-Metal environments, creating test plans, and collaborating with validation teams to debug and resolve system issues. The role requires expertise in DDR/LPDDR architectures, including training, calibration, timing, and PHY operation. You will utilize C, C++, Arm assembly, Python, or other scripting languages to perform data analysis and automation. Essential skills include experience with voltage and frequency margining, silicon operating limits, and using scopes, logic analyzers, and debuggers to solve complex problems related to memory performance and stability.

What you'll do

  • Characterize DDR/LPDDR memory subsystems across process, voltage, temperature, and frequency conditions.
  • Develop system-level stress workloads for Linux and Bare-Metal software environments.
  • Create test plans and implement tests to characterize silicon at the system level.
  • Debug and resolve complex hardware and system issues using scopes, logic analyzers, and debuggers.
  • Perform voltage and frequency margining to determine silicon operating limits.
  • Analyze data to identify memory performance, stability, and failure behaviors.
  • Develop Python automation scripts for characterization tasks and data analysis.

What we're looking for

  • Experience in pre- or post-silicon validation and characterization with an understanding of silicon power, performance, and PVT behavior.
  • Experience with DDR/LPDDR architectures, including training, calibration, timing, and PHY operation.
  • Proficiency in C/C++, Arm assembly, Python, or other scripting languages.
  • Experience with voltage/frequency margining and identifying silicon operating limits.
  • Experience debugging silicon and system issues using scopes, logic analyzers, debuggers, or similar tools.
  • Ability to analyze data, solve complex problems, and communicate technical findings.
  • Experience with DDR/LPDDR PHY characterization, memory-controller interactions, and LPDDR4/4X, LPDDR5/5X, DDR4, or DDR5 (preferred).
  • Experience characterizing memory performance, stability, operating margins, failure behavior, and developing Python automation for data analysis (preferred).

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