Senior FPGA/Silicon Design Engineer

Microsoft

Confirmed live yesterday Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
—
Salary
$119,800–$234,700 / yr
Posted
13 days ago
Freshness
Confirmed live yesterday
Closes
Apr 11, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k
This role $177k
$106k $248k
below market most similar roles pay here above market

This role pays less than 55% of similar roles. Most pay $165,000–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 694 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 651 roles with salary data.

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At a glance

TL;DR · Senior FPGA/Silicon Design Engineer

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The Senior FPGA/Silicon Design Engineer joins the Shared and Custom IP & Silicon team within the Compute Silicon & Manufacturing Engineering organization. This role focuses on developing custom IP for Azure Cobalt chips to optimize cloud infrastructure. The engineer will own FPGA design environments for rapid prototyping, lead custom IP RTL development from microarchitecture through post-silicon validation, and drive PPA optimizations. Key responsibilities include leading design signoff activities such as CDC, RDC, LINT, and timing closure while mentoring other engineers. Required technical skills include expertise in Verilog, SystemVerilog, and VHDL, along with experience in RTL synthesis, linting, and FPGA implementation. Candidates should also possess proficiency in Python, Xilinx FPGA boards, and power analysis tools like ChipWhisperer to solve complex hardware manufacturing and performance challenges.

Skills

FPGA RTL SystemVerilog Verilog VHDL Python Microarchitecture CDC RDC LINT LEC Synthesis Xilinx ChipWhisperer PPA Optimization Post-Silicon Validation Test Automation

What you'll do

  • Lead FPGA design environment efforts for rapid IP prototyping and design validation.
  • Perform root-cause analysis of complex system issues.
  • Develop custom IP RTL from microarchitecture through implementation, verification, and post-silicon validation.
  • Develop high-performance, power-efficient RTL designs and drive PPA optimization.
  • Lead design signoff activities including CDC, RDC, LINT, and timing closure.
  • Mentor engineers and champion design excellence through reviews and automation.

What we're looking for

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience.
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of technical engineering experience.
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of technical engineering experience.
  • Equivalent experience to the degree and years of experience requirements.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including a Microsoft Cloud Background Check.
  • Ability to provide proof of citizenship, US residency, or other protected status for export control regulations.
  • 4+ years experience in digital logic design in SystemVerilog/Verilog/VHDL (preferred).
  • 4+ years experience running synthesis/static check tools including RTL synthesis, lint, CDC, RDC, and/or LEC (preferred).
  • 5+ years of FPGA and RTL design experience (preferred).
  • Expertise in digital design, microarchitecture specification development, and FPGA implementation (preferred).
  • Ability to read and write Python code (preferred).
  • Experience with Xilinx FPGA boards, ChipWhisperer, and test automation infrastructure (preferred).

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