Senior Silicon Circuit Co-Design Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Employment
Full-time
Posted
11 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $194k
This role $216k
$138k most similar roles pay here $278k

This role pays more than 74% of similar roles. Most pay $169,625–$217,500 — the shaded band above. At the midpoint, this role pays about $216k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1391 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1116 roles with salary data.

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At a glance

TL;DR · Senior Silicon Circuit Co-Design Engineer

As a Senior Silicon Circuit Co-Design Engineer within the Silicon Co-Design Group, you will bridge the gap between design intent and silicon reality by owning the co-design, bring-up, and post-silicon validation of analog, digital, and mixed-signal circuits. You will focus on safety, security, reliability, and performance enhancement features across the full PVT space to inform binning, guard-banding, and sign-off decisions. Your daily work involves building methodologies to correlate measured circuit behavior against pre-silicon predictions, tracing failures to their sources, and developing AI agents for automated test orchestration and data pipelines. You will utilize tools such as oscilloscopes, multimeters, DAQs, and spectrum analyzers while leveraging Python or C/C++ for infrastructure development. The role addresses critical challenges in power integrity, transistor physics, and silicon reliability to ensure high-performance products meet rigorous safety and quality standards.

What you'll do

  • Own the co-design, bring-up, and post-silicon validation of analog, digital, and mixed-signal circuits for safety and reliability features.
  • Correlate measured circuit behavior against pre-silicon predictions to identify where models diverge from reality.
  • Trace hardware failures to their root causes, such as power integrity issues or process corner deviations, and drive resolutions.
  • Develop AI agents and automated pipelines to orchestrate testing and accelerate data analysis flows.
  • Build automation and infrastructure tools to enable efficient execution across multiple products simultaneously.
  • Provide data-driven insights for binning strategy, guard-banding decisions, and reliability sign-off.
  • Mentor junior engineers and interns to improve the technical capabilities of the team.

What we're looking for

  • BS or MS in Electrical Engineering, Computer Engineering, or equivalent experience in the lab.
  • 8+ years of hands-on silicon bring-up, frequency and power characterization, or post-silicon validation on real hardware.
  • Strong circuit fundamentals in analog, digital, and mixed-signal domains.
  • Proficiency with laboratory equipment including oscilloscopes, multimeters, DAQs, spectrum analyzers, and silicon debug tools.
  • Expertise in product binning, PVT analysis, guard-banding, and optimization trade-offs.
  • Knowledge of critical path analysis, power integrity, dI/dt, PDN analysis, transistor physics, and reliability mechanisms.
  • Scripting proficiency in Python, C/C++, or equivalent to build automation infrastructure.
  • Experience with datacenter-scale or high-performance silicon (preferred); experience building co-design methodologies or AI-driven flows (preferred).

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