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Linux HPC Docker Singularity Apptainer PodMan RDMA PostgreSQL MySQL MongoDB GPU computing Networking protocols Job schedulers Parallel file systems CI/CD +10 more Show less

Python C Cadence_Virtuoso Spectre Calibre IEEE_802.3 QSFP OSFP QSFP-DD +4 more Show less

SystemVerilog UVM Perl Python Veloce Palladium Zebu HAPS IEV VC Formal PCIe CXL Ethernet RDMA DDR TCP +11 more Show less

Python C++ Matlab VPI JMP PAM4 coherent_optical_communications RF_EO_OE_testing client_optics_DSP_SerDes_testing DAC_ADC_operations test_automation data_analysis_software software_and_testAutomation +8 more Show less

Verilog SystemVerilog Python Perl TCL shell programming CDC Spyglass digital design principles microarchitecture concepts buffering scheduling architectures +7 more Show less

ISO_13485 FDA_Quality_System_Regulation EU_MDR ISO_14971 IEC_60601 CAPA Design_Controls DFMEA Risk_Management Verification_and_Validation Lean_Six_Sigma DMAIC DFSS Minitab HALT_HASS Statistical_Methods PCB_Design Schematics Circuit_Analysis ASQ_Certifications +15 more Show less

Mentor_Graphics schematic PCB_layout MathCad PSpice Saber Ethernet PCIe SerDes eFuse FET Thermal LiB DC_DC FMEA Preliminary_Hazard_Analyses embedded_software verification_and_validation high_speed_Communication_Buses Body_controls lighting_controls +16 more Show less

SDN NFV SDWAN WAN Cloud Networking Secure Access Service Edge Network Security NG Firewalls Identity and Access Management Automation Scripts CI/CD Release Management Documentation Tools +8 more Show less

Verilog VHDL Python Tcl PCIe I2C SPI MDC/MDIO Ethernet Gigabit Ethernet Multi-Gigabit Ethernet 10 Gigabit Ethernet 25G Ethernet 100G Ethernet 400G Ethernet 800G Ethernet DRAM CPU PCB设计 硬件调试 系统级测试 软件团队合作 自动机能力 团队协作 沟通技巧 +20 more Show less

Spice Perl Tcl Make RTL Logic Synthesis Verification Place and Route Design-for-test(DFT) Analog Circuit Design Mixed-Signal Analog Design Digital Circuit Design Security Attacks Detection EM/IR Analysis Static Timing Analysis Noise Analysis Loop Stability Analysis Monte-Carlo Analysis +13 more Show less

SystemVerilog UVM Linux C C++ Python Perl Veloce Palladium Zebu HAPS Networking Dashboard_management CI/CD +9 more Show less

SystemVerilog UVM Linux C++ Python Perl Veloce Palladium Zebu HAPS CI/CD Networking Dashboard_management Emulation_platforms +9 more Show less

SystemVerilog UVM C++ Python Perl Constrained-random testing Functional coverage Assertions CI/CD Debugging Performance profiling Memory subsystems Coherent interconnects GPU architecture Formal verification Emulation +11 more Show less

Verilog SystemVerilog RTL design GPU architecture ASIC design flows linting synthesis timing analysis design quality checks microarchitecture development control logic datapath design memory systems fixed-function acceleration pixel processing pipelines performance optimization power optimization firmware enablement +13 more Show less

TCL Perl Python Cadence_Innovus Synopsys_ICC2 Synopsys_Design_Complier Synopsys_Formality Cadence_Logic_Equivalence_Checker Tempus Synopsys_ICV Mentor_Calibre Static_Timing_Analysis Hierarchical_floor_planning Clock_and_power_distribution Global_signal_and_I_O_planning Physical_verification_DRC/LVS Block_level_EMIR_closure ECO_strategies RTL_to_GDSII_implementation +14 more Show less

React TypeScript JavaScript CSS Git GitHub WCAG CI/CD Unit testing Visual regression testing Accessibility practices Responsive design AI-assisted development tools LLM powered applications Generative AI landscape Modern dev-ops practices +11 more Show less

Spice Perl Tcl Make RTL Logic Synthesis Verification Place and Route Design-for-test(DFT) Analog Circuit Design Mixed-Signal Analog Block Design Digital Circuit Design Security Attacks Detection Circuits EM/IR Analysis Static Timing Analysis Noise Analysis Loop Stability Analysis Monte-Carlo Analysis +13 more Show less

TCP/IP LTE Network Modem/Router Wireless Communications Systems Radio Voice Communications Networks Technical Writing CI/CD Python PostgreSQL Kubernetes Docker AWS Grafana Prometheus +8 more Show less

VMware_ESXI Linux Microsoft_Operating_Systems Fortinet_Firewalls Juniper_SRX_MX_Routers HP_Aruba_Juniper_Switches SSH SCP SFTP RDP Microwave_RF_Network_Design FCC_Licensing API_Concepts OSI_Model RSVP_TE OSPF ISIS BGP MPLS SIP RTP SNMP NAT Routers Switches Stateful_Packet_Firewalls IP_Networking Ethernet TCP_IP L2_L3 CompTIA_Network+_Certification Juniper_JNCIA_Junos_Certification Nokia_NRS1_Certification CCNA_Certification +29 more Show less

HTML CSS JavaScript React LLMs Figma Typography Layout Grids Whitespace Hierarchy Front-end engineering Web design systems Interactive prototypes Conversion optimization Growth experiments Motion design Framer Motion After Effects +14 more Show less