Senior ASIC Design Engineer

Nvidia

Confirmed live yesterday High trust
Remote Hybrid

Quick summary

Work type
Remote
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
9 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $194k
This role $177k
$125k most similar roles pay here $241k

This role pays less than 55% of similar roles. Most pay $172,000–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior ASIC Design Engineer

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As a Senior ASIC Design Engineer on the System ASIC team, you will contribute to the design and implementation of leading GPU and SoC products for applications ranging from consumer graphics to self-driving cars and artificial intelligence. You will work closely with architects and verification engineers to develop sophisticated system-level modules such as Floorsweep, In-silicon measurement, and Reset and Boot controllers. Your daily responsibilities include RTL design, logic synthesis, timing analysis, and integrating modules into the overall SoC design while improving current design flows for better efficiency. The role requires expertise in digital design concepts, verification methodologies, and proficiency in scripting languages like Perl, Python, or C++. Preferred skills include familiarity with ARM CPU architecture, microprocessor fundamentals, reset controllers, fuse controllers, and the UCIe protocol to solve complex chip yield and integration challenges.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

ASIC Design RTL Design SoC Integration Logic Synthesis Timing Analysis Python Perl C++ UCIe Digital Design Verification Methodology Memory Controllers DMA Boot Controllers Fuse Controllers

What you'll do

  • Develop and improve RTL and SoC designs for high-performance GPU and Tegra chips.
  • Design sophisticated system-level modules including Floorsweep, In-silicon measurement, and Reset/Boot controllers.
  • Perform RTL design, logic synthesis, and timing analysis for multiple hardware modules.
  • Integrate individual modules into the overall SoC architecture to ensure successful integration.
  • Participate in the silicon bring-up process to ensure functional success of the chip.
  • Identify and implement improvements in current design flows and methodologies to increase efficiency.
  • Develop scripts using Perl, Python, or C++ to support design flow and automation.

What we're looking for

  • BS/MS degree in Microelectronics, Electronic Engineering, Computer Science, or a related field.
  • 5+ years of experience in ASIC design or SoC integration design and flow.
  • Proficiency in fundamental digital design concepts including RTL design, logic synthesis, and timing analysis.
  • Strong coding skills in Perl, Python, C++, or other industry-standard scripting languages.
  • Basic understanding of verification methodology.
  • Excellent analytical and problem-solving skills with attention to detail.
  • Familiarity with ARM CPU/SoC architecture, microprocessors, and microcontroller fundamentals like caches and memory controllers.
  • Experience with reset controllers, boot, fuse controllers, or UCIe protocol.

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