Senior ASIC Design Engineer

Nvidia

Confirmed live today High trust
Remote

Quick summary

Work type
Remote
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
5 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k
This role $177k
$126k $233k
below market most similar roles pay here above market

This role pays less than 56% of similar roles. Most pay $166,538–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior ASIC Design Engineer

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The Senior ASIC Design Engineer will join the System ASIC team to design and implement leading GPU and SoC products for applications ranging from consumer graphics to self-driving cars and artificial intelligence. Working closely with the System Architecture team, you will define product specifications, develop innovative flows to improve chip yield, and implement Reset and Boot Architecture. Daily responsibilities include RTL design, logic synthesis, and timing analysis for complex system-level modules like Floorsweep and In-silicon measurement. You will integrate these modules into the overall SoC design and participate in the silicon bring-up process. Required skills include fundamental digital design concepts, ASIC design flow experience, and proficiency in Perl, Python, or C++. Familiarity with ARM CPU architecture, microprocessors, and UCIe protocols is also valued.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design RTL Design Logic Synthesis Timing Analysis SoC Integration Python Perl C++ UCIe Digital Design Verification Methodology Boot Controllers Reset Controllers Memory Controllers DMA

What you'll do

  • Develop and improve RTL and SoC designs for GPU and Tegra chips.
  • Design sophisticated system-level modules including Floorsweep, In-silicon measurement, and Reset/Boot controllers.
  • Perform RTL design, logic synthesis, and timing analysis for multiple modules.
  • Integrate individual modules into the overall SoC design.
  • Support the silicon bring-up process and ensure successful SoC-level integration.
  • Identify and implement improvements in current design flows and methodologies to increase efficiency.
  • Define and implement Reset and Boot architectures for complex chips.

What we're looking for

  • BS/MS in Microelectronics, Electronic Engineering, Computer Science, or related field (or equivalent experience).
  • 5+ years of ASIC design experience or SOC integration design/flow experience.
  • Fundamental digital design concepts and experience in RTL design, verification, logic synthesis, and timing analysis.
  • Strong coding skills in Perl, Python, C++, or other industry-standard scripting languages.
  • Basic understanding of verification methodology.
  • Excellent analytical and problem-solving skills and attention to detail.
  • Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals (preferred).
  • Experience with reset controllers, boot, fuse controllers, or UCIe protocol (preferred).

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