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Hardware Security embedded system s Firmware ASIC FPGA Cryptography PKI Key Management Secure Enclaves FIPS 140-3 Common Criteria NIST RISC-V SPDM +9 more Show less

Python C/C++ ASIC PAM4 SerDes Ethernet PCIe JMP Tableau Signal Integrity Circuit Board Layout Hardware Automation TDR BERT Optical Spectrum Analyzers CPO NPO LPO +12 more Show less

ASIC FPGA Signal Integrity Power Integrity Thermal Design System Architecture Verification Silicon Networking Data Center NPI +6 more Show less

Jira Confluence MS Project ChatGPT Codex Claude Design Verification Testing (DVT) PCBAs Procurement Hardware Manufacturing +5 more Show less

Signal Integrity Connector Design Mechanical Engineering Thermal Management Failure Analysis SPC FMEA 8D Design of Experiments NPI Manufacturing Quality Control High-Speed Architecture Cable Assemblies +9 more Show less

Hardware Architecture SoC x86 Signal Integrity Power Delivery Network Oscilloscope JBERT DDR4 LPDDR4 Ethernet C C++ Python Perl Linux Windows Server +11 more Show less

Hardware Design FPGA ASIC Verilog HDL VHDL Python Tcl Ethernet PCIe I2C SPI Schematic Capture Signal Integrity DFT System Bring-up +10 more Show less

Power Electronics Analog Design Circuit Simulation LTspice PSpice Simplis Mathcad PowerDC SIWave Hyperlynx Allegro Python LabVIEW C++ Signal Integrity EMC / EMI Firmware +12 more Show less

Schematic Capture Allegro LTspice Python Perl Signal Integrity High-Speed Serial Links Power Delivery Networks Root Cause Analysis RCA FA FPGA CPLD PCIe MDIO SPI I2C DDR4 DDR5 Oscilloscopes Logic Analyzers +16 more Show less

C/C++ Verilog VHDL Python Perl Spice Ruby Chrome OS MATLAB ASIC design Verification Circuit Board Layout Signal Integrity Power Design Hardware automation Validation Test UNIX JTAG Pre-silicon Post-silicon Computer Architecture CPU GPU +19 more Show less

Verilog system Verilog UVM Python C++ Perl C Shell MySQL PHP Linux Unix Windows HDL Simulation Logic Design Oscilloscopes Logic Analyzers +13 more Show less

C/C++ Verilog VHDL Python Perl Spice Ruby MATLAB ASIC design Verification Circuit Board Layout Signal Integrity Power Design Hardware automation Validation Test UNIX JTAG +13 more Show less

Verilog system Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows HDL Simulation Logic Design Oscilloscopes Multimeters +13 more Show less

Linux C C++ Python SONiC I2C PCIe SPI MDIO TCP/IP Layer 2 Layer 3 ASIC Hardware Bring-up SFF Standards +10 more Show less

ASIC Ethernet PCIe SerDes Python Oscilloscopes Logic Analyzers BERT Signal Integrity Power Integrity SGMII DDR5 USB 3.x I2C UART SPI MDIO eMMC +13 more Show less

x86 ARM Signal Integrity Power Distribution PCIe Gen5 DDR4 DDR5 Cadence Concept Allegro High Speed Network Interfaces ASIC Hardware Design System Level Development +8 more Show less

Signal Integrity Power Integrity ASIC PAM4 SerDes Cadence Sigrity Ansys HFSS Keysight ADS Cadence APD SPICE HBM UCIe CoWoS EMIB Vector Network Analysis IBIS Transmission Line Theory +12 more Show less

Signal Integrity Power Integrity ASIC Cadence Sigrity Ansys HFSS Keysight ADS Cadence APD SPICE PAM4 SerDes HBM UCIe CoWoS EMIB Vector Network Analysis IBIS +11 more Show less

Post-Silicon Validation SoC Python C++ DFT SRAM VNA BERT Oscilloscopes Logic Analyzers Signal Integrity High speed mixed-signal design MBIST Schematics Layout Failure Analysis +11 more Show less

x86 SoC Signal Integrity Power Delivery Network DDR4/5 LPDDR4/5 Ethernet Linux Windows Server C C++ Python Perl Oscilloscope JBERT Circuit Design root-cause analysis +12 more Show less