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SystemVerilog UVM C++ PCIe CXL ARM AMBA Python CI/CD MentorGraphicsCalibre SynopsysVCS Linux Git Docker Jenkins GitHub GoogleCloudPlatform AzureDevOps AItools +14 more Show less

Verilog SystemVerilog UVM SVA VCS Perl Tcl Makefiles Python LLMs Agentic AI frameworks VCS-XA Gate Level Simulation Formal Equivalence +9 more Show less

SystemVerilog UVM C++ Python Perl Shell scripting VCS Debussy GDB ASIC verification dynamic memory controllers ddr2 ddr3 ddr4 ddr5 lpddr2 lpddr3 lpddr4 lpddr5 lpddr6 HBM GDDR +17 more Show less

Verilog SystemVerilog Python Perl RTL simulation waveform debug digital design logic design concepts +3 more Show less

SystemVerilog UVM C++ Python PCIe CXL CHI VCS Debussy GDB +5 more Show less

Python AI ML EDA LLMs Data Science Power Modeling Transistor Device Physics System-Level Optimization Silicon Validation HW-SW Co-Design CPU/GPU/SoC Architecture Codesign Engineering Post-Silicon Bring-Up Frequency and Power Characterization +10 more Show less

Python C++ PyTorch JAX TensorRT LLVM MLIR TVM XLA Type Systems Program Semantics Proof-Based Verification Quantization Operator Fusion Mixed-Precision Graph-Level Optimization +11 more Show less

SystemVerilog UVM C Python HLS FPGA Simulation Regression Coverage CI/CD +5 more Show less

C C++ Rust Git Make CMake CUDA OpenCL SMT SymbolicExecution ModelChecking InteractiveTheoremProving LLMAgents NeurosymbolicApproaches CI/CD +10 more Show less

SystemVerilog UVM OVM Python UPF FunctionalCoverage PowerAwareVerification EmulationVerification HardwareSoftwareCoVerification GPU CPU DDR Bus +8 more Show less

C C++ SystemVerilog UVM Perl Python Verilog VHDL Kubernetes Docker CI/CD Git Jenkins GitHub SV Assertions Coverage Tools Power Estimation Tools SpeedBridges +13 more Show less

SystemVerilog UVM VMM Perl Python C C++ PCIe USB SATA Simulation Debugging CoverageDrivenVerification AssertionBasedVerification +9 more Show less

Java Python JavaScript TypeScript Ember.js Vue.js Apache Kafka Kafka Streams Apache Flink Redis Elasticsearch Kibana Logstash OpenTelemetry Grafana ClickHouse Linux +12 more Show less

Java Python Docker Kubernetes CI/CD Microservices OOP Scalability APIs REST SQL NoSQL AWS Azure Git Jenkins PostgreSQL Redis MongoDB ML Agile SRE +17 more Show less

SystemVerilog UVM Python Perl RTL simulation Hardware emulation FPGA prototyping C-model verification Verification IP Reusable verification components EDA tools CI/CD +7 more Show less

C C++ SystemVerilog Verilog VHDL Perl Python UVM PCIe CXL NVLink IB Ethernet I2C I3C SPI UART Zebu_emulation +13 more Show less

Python SystemVerilog C++ GPU_architecture RTL_design Simulation_Acceleration Emulation Data_Visualization HW_SW_co-verification SoC_architecture Big_Data_Analytics +6 more Show less