below marketmost similar roles pay hereabove market
This role pays less than
56%
of similar roles. Most pay
$168,425–$217,700
— the blue band above.
At the midpoint, this role pays about
$177k
versus about
$193k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
694 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 651 roles with salary data.
The Senior Design Verification Engineer joins the Accelnet Hardware team to build, test, and deploy networking acceleration for Azure. This role focuses on the world's largest deployment of Field-Programmable Gate Array SmartNICs. You will develop infrastructure for next-generation Software-Defined Networking, addressing problems like arbitrary packet manipulations, virtualization overhead, network security, and Remote Direct Memory Access performance. Daily responsibilities include building scalable constrained random verification environments, creating comprehensive test plans, and executing test cases using coverage-driven metrics. You will utilize System Verilog, Universal Verification Methodology, and scripting to automate test suites for continuous integration and development. The work involves applying Agile methodologies, hosting code reviews, and managing iterative feature deployments to solve complex hardware and networking challenges within a high-performance public cloud environment.
What does a Design Verification Engineer earn?
Median $189224 from 84 postings across 10 companies.
Build scalable constrained random verification environments in SystemVerilog using prevalent verification methodologies.
Create comprehensive test plans to address functional scenarios with software and hardware design teams.
Execute test plans by adding test cases and tracking verification through coverage-driven metrics.
Enhance verification environments by adding sequences, constraints, assertions, and functional coverage.
Write scripts to automate and maintain test suite execution for CI and CD flows.
Host code reviews and participate in sprint planning using Agile development methodologies.
Handle on-call responsibilities to address hardware issues reported by customers.
What we're looking for
Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field and 3+ years technical engineering experience.
Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field and 5+ years technical engineering experience.
Equivalent experience to the required degrees and years of experience.
Ability to pass the Microsoft Cloud Background Check.
Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field and 3+ years technical engineering experience (preferred).
Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field and 6+ years technical engineering experience (preferred).
Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field and 8+ years technical engineering experience (preferred).
7+ years technical engineering experience with Universal Verification Methodology (UVM), System Verilog and Verification Fundamentals (preferred).