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FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Redmond, WA 2 days ago $125,000–$145,000
Actively hiring Posted this week Verified listing Below market
SystemVerilog Verilog Python C C++ Bash DSP AXI AHB APB FPGA ASIC Microprocessors Oscilloscopes Spectrum Analyzers
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Principal FPGA / RTL Design Engineer - Signal Processing

Motorola Solutions

Los Angeles, CA 5 days ago $175,000–$225,000
Actively hiring Posted this week Verified listing Competitive pay
Vivado Xilinx FPGA RTL Python Perl MATLAB Fixed_point_design Multiple_clock_domain_FPGA_designs Digital_signal_processing Wireless_communication_systems
Hybrid
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Wireless FPGA Prototype Design Engineer

Apple Inc

San Francisco, CA 22 days ago $181,100–$318,400
Actively hiring Verified listing Above market
FPGA Verilog Python Perl Shell C JTAG Oscilloscope Logic Analyzer LitePoint Palladium IEEE 802.11 Bluetooth APB AHB AXI USB I2C SPI
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FPGA Prototyping Design Engineer

Apple Inc

Sunnyvale, CA 39 days ago $126,800–$220,900
Actively hiring Competitive pay
Verilog SystemVerilog Xilinx FPGA Vivado IP Integrator Linux Python Tcl Git PCIe I2C SPI UART High-speed SERDES IEEE 802.11 Bluetooth Synopsys HAPS Make TeamCity
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Wireless FPGA Prototype Design Engineer

Apple Inc

San Francisco, CA 42 days ago $126,800–$220,900
Actively hiring Competitive pay
FPGA Verilog Python Perl Shell C JTAG Oscilloscope Logic Analyzer LitePoint Palladium IEEE 802.11 Bluetooth APB AHB AXI USB I2C SPI
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