Director FPGA Silicon Design Engineering

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$248,800–$373,200 / yr
Posted
11 days ago
Freshness
Confirmed live yesterday
Closes
Aug 31, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $203k
This role $311k
$136k most similar roles pay here $399k

This role pays more than 99% of similar roles. Most pay $171,875–$234,600 — the shaded band above. At the midpoint, this role pays about $311k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Director FPGA Silicon Design Engineering

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The Director FPGA Silicon Design Engineering will lead a team of architects and engineers to define the long-term vision and technical roadmap for adaptive devices. This leadership role focuses on the architecture of FPGA configuration, readback, and Partial Reconfiguration (PR) within heterogeneous SoC and chiplet environments. The successful candidate will manage the development of bitstream formats, boot flows, debug observability, and runtime reconfiguration technologies while balancing trade-offs between performance, power, reliability, security, and programmability. Key responsibilities include translating customer requirements from AI, Data Center, Embedded, and Automotive markets into differentiated product strategies. Required expertise includes FPGA toolchains, synthesis, place-and-route, memory hierarchies, and high-speed interconnects. The role involves driving cross-functional alignment across silicon, RTL, software, tools, and validation teams to deliver scalable solutions for complex hardware systems.

Skills

FPGA SoC Chiplet RTL Partial Reconfiguration Bitstream Silicon Architecture Memory Hierarchy High-Speed Interconnects Synthesis Place-and-Route System Integration Debug Observability

What you'll do

  • Define and drive next-generation architecture for FPGA configuration, readback, and Partial Reconfiguration (PR).
  • Establish the long-term architectural vision and roadmap for debug observability and system integration.
  • Lead innovation in runtime reconfiguration technologies for adaptive, high-availability systems.
  • Manage technical trade-offs between performance, power, reliability, security, and programmability across chiplet environments.
  • Develop architecture specifications and guide implementation teams through the execution and productization phases.
  • Partner with software and tools organizations to deliver end-to-end configuration and debug solutions.
  • Translate customer requirements from AI, Data Center, and Automotive markets into differentiated FPGA capabilities.
  • Build and lead a team of architects and engineers to drive technical excellence and cross-functional alignment.

What we're looking for

  • Hold a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Possess deep expertise in FPGA architecture, specifically regarding configuration and Partial Reconfiguration (PR).
  • Demonstrate experience in FPGA, ASIC, or SoC architecture with significant technical leadership responsibilities.
  • Exhibit a proven track record of leading teams and driving cross-functional initiatives from concept to product release.
  • Show proficiency in modern silicon architectures, including chiplet-based systems, memory hierarchies, and high-speed interconnects.
  • Demonstrate the ability to influence product strategy, roadmap planning, and executive-level decision-making.
  • Possess a strong understanding of FPGA toolchains, including synthesis, place-and-route, and implementation flows.
  • Exhibit excellent communication skills and experience in stakeholder management and customer-facing roles.

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