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Active Keyword: ASIC Design Engineer Remove filter Location: Irvine Remove filter Clear all

4 of up to 20 (filtered)

Senior ASIC Design Verification Engineer

SpaceX

Irvine, CA 59 days ago $165,000–$260,000
Actively hiring Confirmed live yesterday Low trust Above market
ASIC Design Verification UVM OVM VMM RTL Python Constrained Random Verification test bench development Pre-silicon Verification Post-silicon Validation Chip Bring-up Object-Oriented Programming Scripting Functional Coverage
5+ yrs exp
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Senior SOC/ASIC Physical Design Engineer

SpaceX

Irvine, CA 108 days ago $165,000–$260,000
Actively hiring Confirmed live yesterday Low trust Competitive pay
ASIC SOC Physical Design RTL2GDSII Static Timing Analysis (STA) EDA Tools Python TCL Perl Bash Makefile DFT Scan MBIST LBIST FinFET CMOS Floorplanning Place and Route Synthesis
5+ yrs exp
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ASIC Design Engineer

Broadcom

Irvine, CA +1 162 days ago $127,100–$203,400
Actively hiring Confirmed live 2 days ago High trust Below market
ASIC Implementation Synthesis Design for Test Floorplanning Place and Route Clock Methodology Power Planning Timing Closure Signal Integrity Physical Design
10+ yrs exp
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ASIC Design Engineer

Broadcom

Irvine, CA +1 162 days ago $108,000–$172,800
Actively hiring Confirmed live 2 days ago High trust Below market
ASIC Implementation Synthesis Design for Test Floorplanning Place and Route Clock Methodology Power Planning Timing Closure Signal Integrity Physical Design
8+ yrs exp
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