Apple Inc

3,499 open roles Visit website
Sign in to favorite

Employer

About Apple Inc

Published by FindRole · most recent listing · Methodology

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3499 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2707 roles with salary data.

Most-posted roles

How Apple Inc posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

77.4%
of open roles publish a salary range

Layoffs · WARN filings

Trending down

1,074 workers affected across 15 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

3,499 total

CPU Implementation Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live yesterday High trust
RTL Synthesis place-and-route Static Timing Analysis STA floor-planning PPA DRC LVS ECO Power Intent Validation IR Drop EMIR
2+ yrs exp
Save

FE Engineering

Cupertino, CA 28 days ago $174,149–$225,300
Actively hiring Confirmed live today Trusted Above market
SystemC Verilog SystemVerilog VHDL C C++ MATLAB FPGA HAPS Palladium Protium RTL High-Level Synthesis SoC Design Design Verification CDC DFT Timing Closure
1+ yrs exp
Save

FE Engineering

Austin, TX 28 days ago
Actively hiring Confirmed live today High trust
Logic Synthesis RTL Verilog System Verilog Static Timing Analysis (STA) DFT Lint UPF Python Perl Tcl ECO Formal Logic Equivalence Physical Design CAD Hardware Description Languages (HDLs)
1+ yrs exp
Save

FE Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live yesterday Low trust
Verilog RTL Design Cache Coherency Protocols Verdi Micro-architecture Gate-level Design LEC LEQ Clock Gating Power Gating Bus Gating Simulation Hardware Prefetching
Save

Module Design Engineer

Cupertino, CA 28 days ago $150,400–$225,300
Actively hiring Confirmed live yesterday High trust Competitive pay
Allegro Altium ECAD PCB Layout Schematic Capture FPGA Microcontrollers SPI I2C UART LVDS Signal Integrity Power Integrity Failure Analysis Root Cause Analysis Oscilloscope Spectrum Analyzer Logic Analyzer Signal Generator DMM
3+ yrs exp
Save

Silicon Product Engineer

Cupertino, CA 28 days ago $149,987–$218,000
Actively hiring Confirmed live today High trust Competitive pay
Jmp Pro 17 Python Perl JSL Statistical Analysis SoC ATE SRAM Memory Design Logic Design PDN Power Integrity Circuit Schematic Layout Design PERC Low Pass Filter Design nano fabrication
Save

Module Design Engineer

Cupertino, CA 28 days ago $150,400–$225,300
Actively hiring Confirmed live today High trust Competitive pay
Camera System Architecture Electro-mechanical Systems Image Signal Processing MATLAB JMP Finite Element Analysis (FEA) Mechanical Modeling Firmware Signal Integrity Data Analysis Rapid Prototyping Failure Analysis
Save

Business Systems Analyst

Austin, TX 28 days ago
Actively hiring Confirmed live yesterday High trust
SQL Oracle PL/SQL Python ERP GitHub Excel Data Mining Business Process Re-engineering Technical Specifications Source Code Management
4+ yrs exp
Save

FE Engineer

Cupertino, CA 28 days ago $174,149–$225,300
Actively hiring Confirmed live today Trusted Above market
System Verilog Verilog RTL Python Perl TCL SoC CDC RDC UPF CPF Synopsys Cadence LEC LEQ DVFS STA Synthesis
Save

Hardware Systems Engineering

Cupertino, CA 28 days ago $150,400–$225,300
Actively hiring Confirmed live today High trust Competitive pay
Cadence PCB Layout Schematic Capture I2C SPI GPIO Oscilloscope Spectrum Analyzer Logic Analyzer DMM Power Analyzer Failure Analysis NPI Power Electronics Radio Sensors Audio
3+ yrs exp
Save

Digital Circuit Design Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today High trust
SRAM Design RTL Cadence Virtuoso SPICE Model Sim Digital P&R Static Timing Analysis PrimeTime NanoTime Skill DFT GDS WaveView SpiceExplorer Layout Tools
Save

Design Verification Engineer

Cupertino, CA 28 days ago $174,149–$194,700
Actively hiring Confirmed live today Trusted Competitive pay
System Verilog UVM Python Perl RTL SoC Verification Constrained Random Verification Functional Coverage Computer Architecture Digital Design Verification Methodology
Save

Digital Circuit Design Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today High trust
RTL SRAM Design Cadence Virtuoso SPICE Static Timing Analysis PrimeTime DFT IR/EM Machine Learning Circuit Design Schematic Capture Power Gating Clock Gating Spice Explorer
Save

Physical Design Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today Trusted
PnR STA Tcl Shell Scripting DRC LVS Physical Design IR Drop Electromigration Gate-level Patching CAD Utilities
Save

Hardware Systems Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today High trust
54V DC Power Circuitry Schematic Capture HDI Oscilloscope Network Analyzer BERT Python C Cadence System Capture I2C SPI UART Analog Circuitry Firmware Electrical Characterization
1+ yrs exp
Save

Physical Design Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today Trusted
Physical Design PnR STA TCL Shell Scripting DRC LVS CTS GDS2 Netlist IR Drop Electromigration EDA Tools
Save

VLSI CAD Engineer (Electronics Engineer)

Cupertino, CA 28 days ago $150,400–$225,300
Actively hiring Confirmed live yesterday High trust Competitive pay
SPICE Virtuoso SKILL Python Perl TCL ADE OCEAN Maestro EDA CMOS RF Mixed-Signal Circuit ERC Flow Automation
Save

FE Engineer

Cupertino, CA 28 days ago $174,149–$225,300
Actively hiring Confirmed live today Trusted Above market
Python Pandas Matplotlib Seaborn scikit-learn Tableau Splunk VLSI Digital Logic Memory-mapped I/O Interrupts System Software SoC Architecture
Save

Design Verification Engineer

Austin, TX 28 days ago
Actively hiring Confirmed live today Low trust
System Verilog UVM Python Perl C++ NCSIM Xcelium RTL Digital Design Computer Architecture Functional Coverage Code Coverage PCI Express DisplayPort MIPI SOC Memory Management Unit
Save

Design Verification Engineer

Cupertino, CA 28 days ago $150,400–$225,300
Actively hiring Confirmed live yesterday Trusted Competitive pay
System Verilog Verilog Python C C++ RTL VLSI SoC UPF ATE Firmware Digital Design Analog Co-simulation Timing Simulation
Save