This role pays more than
50%
of similar roles. Most pay
$168,500–$229,100
— the shaded band above.
At the midpoint, this role pays about
$188k
versus about
$199k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
3553 open roles
on FindRole.
Listed pay typically runs
$165,800–$277,600
across 2740 roles with salary data.
As a Design Verification Engineer, you will join the hardware team to ensure bug-free first silicon for part of the SoC and IP. You will be responsible for developing detailed test and coverage plans based on micro-architecture while creating scalable and portable verification methodologies. Your daily work involves building verification environments including stimulus, checkers, assertions, trackers, and coverage, as well as executing plans for design bring-up, regression enabling, and debugging test failures. You will also perform digital and analog co-simulations, low power simulations with firmware and UPF, and ATE based electrical characterization. To succeed, you must utilize SystemVerilog, Verilog, Python, C, and C++ to model hardware behavior and automate tasks. The role focuses on solving complex technical challenges in computer architecture and VLSI design to ensure reliable IP and firmware delivery.
What does a Design Verification Engineer earn in California?
Median $189224 from 46 postings across 7 companies.
SystemVerilog
C
Python
Perl
Shell Scripting
Verilog
VCS
Verdi
MATLAB
Digital Electronics
RTL
Regression Automation
CPU Architecture
Functional Coverage
System Verilog
UVM
C
C++
Python
Perl
EDA Tools
Digital Design
Computer Architecture
ASIC
High-speed Interface Protocols
Simulation
Regression Analysis
Functional Coverage
Constrained Random Verification