Design Verification Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Austin, TX
Posted: 1 day ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

How this pay compares to similar roles

Similar $199k

$141k most similar roles pay here $240k

This listing doesn't post a salary. Most similar roles pay $168,500–$229,100.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · Design Verification Engineer

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As a Design Verification Engineer, you will ensure the quality of the SOC or specific IP and subsystems by reviewing design and architecture specifications while collaborating with micro-architecture teams. You will develop test plans, coverage plans, and next-generation verification methodologies and test benches to address use cases and corner conditions. The role involves working on diverse components including Neural Engine hardware, DRAM subsystems, memory controller logic, Encode and Decode systems for ProRes and other codec formats, hardware security, high-speed IO standards like PCI Express, power management, and display subsystems. You will utilize SystemVerilog, UVM, Python, Perl, C++, NCSIM, and Xcelium to perform waveform debugs and write test sequences. Your work requires deep knowledge of digital design, computer architecture, RTL assertion writing, and both functional and code coverage analysis to identify and close coverage holes.

What does a Design Verification Engineer earn?

Median $195800 from 78 postings across 10 companies.

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Skills

System Verilog UVM Python Perl C++ NCSIM Xcelium RTL Digital Design PCI Express DisplayPort MIPI Functional Coverage Code Coverage Assertions Hardware Security Memory Management Unit Power Management Fabric Infrastructure

What you'll do

Ensure the quality of SOCs, IPs, or subsystems through rigorous verification.
Review design and architecture specifications to align with micro-architecture requirements.
Develop comprehensive test plans, coverage plans, and next-generation verification methodologies.
Create test benches and test sequences using SystemVerilog and UVM.
Write scripts in Python or Perl to automate verification tasks.
Perform waveform debugging using NCSIM and Xcelium tools.
Implement assertions to verify RTL designs.
Analyze functional and code coverage to identify and close coverage holes.

What we're looking for

Bachelor's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
Experience or education in implementing Computer Architecture to understand micro-architecture.
Proficiency in System Verilog and UVM to develop test-bench code and test sequences.
Ability to use Python or Perl for scripting.
Experience using NCSIM and Xcelium for waveform debug.
Proficiency in C++ for writing CPU code.
Ability to write assertions to verify RTL.
Knowledge of Digital Design, functional coverage, and code coverage to identify test coverage holes.

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