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C C++ Python Bluetooth Computer Vision Android Algorithms Linux Git Docker Jenkins CI/CD PostgreSQL MySQL Kubernetes AWS Google Cloud Platform Terraform GitHub SVN +15 more Show less

SystemVerilog ASIC RTL Digital IP Design Logic Synthesis Linting Checks Clock Domain Crossing Low Power Implementation Gate Level Simulation DFT High Speed Parallel Interfaces Design for Test +7 more Show less

Circuits ElectricalEngineering Algorithms Design Automation Python MATLAB Verilog SystemVerilog VHDL Cadence TannerEDAv12 AnsysQ3DExtractor SpiceSimulationTools Git JIRA Confluence CI/CD +13 more Show less

RTL Verilog SystemVerilog VHDL ASIC LPDDR HBM NoC CPU x86 ARM Cache Controller Memory Subsystem Digital Design Synthesis Timing Closure Physical Design Gate Level Simulation Power Analysis RTL Design Verification +15 more Show less

C++ SystemC HBM Memory_Hierarchies DRAM_Systems AI/ML GPU HPC Post_Silicon_Performance_Analysis SoC_Architecture TLM HBM2 HBM2E HBM3 +9 more Show less

VCS Fusion Compiler PrimeTime Power Compiler (PTPX) DFT Compiler Spyglass Python Perl +3 more Show less

Verilog SystemVerilog UVM SerDes CDR DFE CTLE TXFIR Python Perl Tcl VHDL ModelSim Cadence Calibre Linux Git SVN PCIe Ethernet InfiniBand USB C++ MATLAB +19 more Show less

NVLink PCI-Express Ethernet UCIE ASIC RTL Verilog System-on-Chip High-speed connectivity protocols Data movers Protocol adaptors Network-on-chip Arbiters Schedulers Formal verification Verification engineering Synthesis Timing analysis Micro-architecture specification +14 more Show less

SystemVerilog UVM VMM Perl Python C C++ PCI_Express USB SATA +5 more Show less

Altium Designer Python C MS Office Google Suite MIL-STD DMM Bench top supply Oscilloscope Logic analyzer Spectrum analyzer MIL-STD-810 MIL-STD-461 MIL-STD-464 MIL-STD-1472 +10 more Show less