Next-Gen High-Speed HBM LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$101,400–$152,200 / yr
Posted
36 days ago
Freshness
Confirmed live today
Closes
Mar 20, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $199k
This role $127k
$84k $262k
below market most similar roles pay here above market

This role pays less than 96% of similar roles. Most pay $171,212–$227,300 — the blue band above. At the midpoint, this role pays about $127k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Next-Gen High-Speed HBM LPDDR Memory Subsystem ASIC Digital Design Engineer

The Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer joins the ASICS Engineering group to support the development of high performance, high quality, and low power products. This role involves defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP block and SoC development. The engineer will create architectures, circuit specifications, logic designs, and system simulations based on system-level requirements while collaborating on implementation strategies. Key responsibilities include evaluating process flows from high-level design to synthesis, place and route, and timing and power use. The position requires proficiency with architecture and design tools, scripting tools, programming languages, and design verification methods. Candidates will utilize specific applications such as RTL to GDS Flow and Virtuoso to execute designs for IC Packages.

What you'll do

  • Define, model, design, and optimize IP block and SoC development for high-performance products.
  • Verify, validate, implement, and document digital and analog IP development.
  • Create architectures, circuit specifications, logic designs, and system simulations based on requirements.
  • Develop implementation strategies that meet specific system requirements and customer needs.
  • Evaluate process flows from high-level design to synthesis, place and route, and timing.
  • Use tools like RTL to GDS Flow and Virtuoso to execute architecture and design for IC packages.
  • Write technical documentation for EDA, IP, and ASIC projects.

What we're looking for

  • Bachelor's degree in Science, Engineering, or a related field.
  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science (preferred).
  • 6+ months of experience with architecture and design tools (preferred).
  • 6+ months of experience with scripting tools and programming languages (preferred).
  • 6+ months of experience with design verification methods (preferred).

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