Hardware (CPU, GPU, SoC, Digital Design, DV) Engineering Internship – Summer 2027 is an internship opportunity where candidates join multi-disciplinary teams to work on system architecture, front-end design, implementation, physical design, and pre-silicon verification. Depending on the assigned track, interns will perform tasks such as developing RTL for modem processing, validating CPU and SoC micro-architecture concepts, performing GPU pipeline validation, or managing power and thermal management strategies. The role requires proficiency in programming languages including C, C++, Python, Perl, Verilog, and SystemVerilog. Candidates may also utilize tools like Matlab and UVM while addressing technical challenges in digital signal processing, wireless communication standards like 5G and LTE, and machine learning workloads on embedded systems. This position focuses on the development of high-performance computing components including processors, graphics units, and integrated system-on-chip designs.
Develop and design hardware for MSM SoC and chipset architectures.
Implement ASIC designs for image processing camera IP.
Validate GPU pipelines using stimulus generators, checkers, monitors, and drivers.
Perform graphics power analysis and optimization using Vulkan.
Execute verification plans including regression, debug, and bring-up for CPU and SoC micro-architecture.
Develop RTL for modem physical and MAC layer processing.
Create verification components using SystemVerilog and UVM to model cellular modem datapaths.
Perform post-silicon validation, characterization, and system-level performance modeling.
What we're looking for
Must be currently enrolled in a bachelor’s, master’s, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field.
Must be available for 11–14 weeks during Summer 2027 (May–September).
Expected graduation date must be November 2027 or later.
Candidates pursuing a degree with an anticipated graduation between November 2027 and June 2028 are preferred.
Candidates currently enrolled in a Master’s or PhD degree program in computer engineering, electrical engineering, or a related field are preferred.
Must have at least 1 year of academic experience with programming languages such as C, C++, Python, Perl, Verilog, or SystemVerilog.
Experience with machine learning concepts applied to digital signal processing or modem architecture is a plus.
C
C++
Python
Distributed systems
Networking protocols
Multi-threaded programming
Multi-processor systems
System performance optimization
Software debugging
Discrete event simulation
Polyglot programming
Linux
Routing
Bridging