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Datacenter Design Construction Engineering Architecture Site Due Diligence PMP EPC +1 more Show less

FPGA SoC Chiplet RTL Partial Reconfiguration Bitstream Silicon Architecture Memory Hierarchy High-Speed Interconnects Synthesis Place-and-Route System Integration Debug Observability +8 more Show less

Verilog system Verilog UVM Python C++ Perl C Shell MySQL PHP Linux Unix Windows HDL Simulation Debugging Oscilloscopes Logic Analyzers +13 more Show less

Verilog system Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows HDL Digital Systems Computer Organization Hardware Design Simulation Debugging Oscilloscopes +15 more Show less

Verilog system Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows HDL Simulation Debugging Oscilloscopes Logic Analyzers +13 more Show less

Verilog system Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows HDL Logic Design Simulation Debugging Oscilloscopes Logic Analyzers +14 more Show less

UVM System Verilog C-DPI FPGA ASIC Firmware SoC AXI AHB DMA Cryptography Data Compression Silicon Bring-up Emulation Micro-architecture +10 more Show less

AWS Terraform Terraform Cloud GitHub Actions Python Bash PowerShell Kubernetes FinOps Agile Scrum Bedrock Claude Code Cursor Backstage +10 more Show less

SystemVerilog UVM Verilog Python Perl C C++ Linux ASIC Design Formal Verification Jasper Gold Veloce Palladium Zebu HAPS PCIe Ethernet RDMA TCP Fiber Channel P4 +16 more Show less

Data Center Infrastructure Plumbing Commissioning Infrastructure Lifecycle Management Risk Management EPC Basis of Design (BOD) Systems Engineering Fire Protection +4 more Show less

RFIC Layout Analog Layout mixed signal design Python Perl Shell Scripting Linux Revision Control Systems Circuit Design Advanced Node IC Layout tape out Density Fill +7 more Show less

MMIC Design GaAs GaN ADS HFSS AWR Altium Designer Python Matlab C++ S-band E-band Spectrum Analyzers Vector Signal Analyzers Network Analyzers PCB Design +11 more Show less

RFIC Layout Analog Layout mixed signal design Python Perl Shell Scripting Linux Revision Control Circuit Design tape out +5 more Show less

RFIC Analog IC Mixed-Signal SiGe CMOS Spectre ADS HFSS Momentum Phase-Locked Loops Vector Modulators Mixers Filters Power Amplifiers QPSK APSK QAM Spectrum Analyzers Network Analyzers +14 more Show less

RFIC Layout Analog Layout IC Design mixed signal Python Perl Shell Scripting Linux Revision Control Circuit Design tape out +6 more Show less

RFIC Layout Analog Layout IC Design mixed signal Python Perl Shell Scripting Linux Revision Control Circuit Design +5 more Show less

Silicon Photonics PIC RFIC Lumerical COMSOL HFSS Spectre ADS SerDes PAM4 NRZ CPO mixed signal DSP CTLE +10 more Show less

Silicon Photonics PIC Lumerical COMSOL HFSS Spectre ADS RFIC SerDes PAM4 NRZ DSP mixed signal CPO CTLE Spectrum Analyzers +11 more Show less

RFIC Analog IC Mixed-Signal SiGe CMOS Spectre ADS HFSS Momentum Phase-Locked Loops Vector Modulators Oscillators Mixers Filters Power Amplifiers QPSK APSK QAM Spectrum Analyzers Network Analyzers +15 more Show less