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Senior Engineer, Physical Design AI/ML

Samsung Semiconductor

San Jose, CA 11 days ago $138,000$206,000
Actively hiring Confirmed live yesterday High trust Competitive pay
Machine Learning Deep Learning Python C++ PyTorch TensorFlow EDA Tools RTL Synthesis Place and Route Clock Tree Synthesis Bayesian Optimization Active Learning LangGraph CrewAI Generative AI PDK Generation DRC LVS

AI-Driven ASIC Physical Design Principal Engineer

Cisco

Remote (San Jose, CA) 18 days ago $250,600$362,600
Actively hiring Confirmed live 2 days ago High trust Above market
Python Claude Innovus ICC2 Calibre Tcl Docker OpenAI API Pinecone Weaviate RAG LLM MLPD STA DRC EDA Tools Vector Databases
10+ yrs exp Remote

Physical Design Engineer

Broadcom

San Jose, CA 18 days ago $143,800$230,000
Actively hiring Confirmed live yesterday High trust Competitive pay
ASIC Physical Layout 3D IC DRC LVS TCL Python High-Speed Signal Interconnects SI PI RDL Advanced Packaging PCB Layout
10+ yrs exp

Physical Design Engineer

Broadcom

San Jose, CA 18 days ago $143,800$230,000
Actively hiring Confirmed live 2 days ago High trust Competitive pay
ASIC Physical Layout 3D IC DRC LVS TCL Python SI PI RDL Advanced Packaging PCB
10+ yrs exp

Senior Physical Design Engineer

Samsung Semiconductor

San Jose, CA 23 days ago $138,000$206,000
Actively hiring Confirmed live 2 days ago High trust Competitive pay
ASIC SoC RTL GDSII Synthesis Floorplanning Clock Tree Synthesis STA SDC UPF CPF DRC LVS Tcl Python Perl FinFET NoC AI/ML
5+ yrs exp

Physical IC Design Engineer

Broadcom

San Jose, CA 32 days ago
Actively hiring Confirmed live 2 days ago Trusted
Physical Design RTL to Tape-out Synthesis Timing Closure EM/IR Analysis Place and Route Clock Tree Synthesis Floor-planning Layout TCL Perl EDA Tools ASIC PCIe Machine Learning
10+ yrs exp

SoC Physical Design Engineer, Power Delivery

Apple Inc

San Jose, CA 58 days ago $184,700$324,800
Actively hiring Confirmed live yesterday High trust Above market
Physical Design TCL Python ASIC Integration Floorplanning Power Distribution Signal Planning I/O Planning Hard IP Integration Tapeout Voltage Drop Analysis STA Layout Verification DRC CAD Scripting
10+ yrs exp

Physical IC Design Engineer

Broadcom

San Jose, CA 84 days ago $143,800$230,000
Actively hiring Confirmed live yesterday Trusted Competitive pay
Physical Design RTL to Tape-out Synthesis Timing Closure EM/IR Analysis Place and Route Clock Tree Synthesis Floor-planning Layout TCL Perl EDA Tools ASIC Machine Learning PCIe
10+ yrs exp

SoC Physical Design Methodology Engineer

Apple Inc

San Jose, CA 156 days ago $184,700$324,800
Actively hiring Confirmed live yesterday Trusted Above market
Physical Design SoC PPA Parasitic Extraction Spice Static Timing Analysis Python Tcl Machine Learning Data Science Circuit Design Signoff Flows Power Delivery Interconnects
10+ yrs exp