Amd

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About Amd

Published by FindRole · most recent listing · Methodology

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

Most-posted roles

How Amd posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

100.0%
of open roles publish a salary range
97.5%
of its listings are still up 30 days after appearing
32.0%
of those closed while an identical title stayed posted
25
listings we saw close in the last 90 days

Open roles are down 28 from a week ago (524 then).

More than half of Amd’s listings are still up at the end of our 87-day observation window, so we cannot yet say how long a typical one lasts.

Estimated over 539 listings, of which 25 closed during the window — listings still up are counted as lasting at least as long as we have seen them, rather than being left out. Leaving them out is what makes a plain average of closed listings read far too short.

The repost figure describes the 25 of this employer’s listings we have watched close since September 2026 — not all of its hiring, and not a rate we project forward. A repost means the listing closed while the same employer had another live listing under the same title: a signal, not a verdict, since two genuinely separate openings can share one title. See the methodology.

Layoffs · WARN filings

57 workers affected across 1 filing since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

496 total

Technical Sales Engineer, Graduate Rotational Program

San Jose, CA 33 days ago $129,760–$194,640
Actively hiring Confirmed live yesterday High trust Below market
x86 FPGA Digital Design Computer Engineering Electrical Engineering Technical Marketing Product Marketing Business Operations Technical Presentations Software Tools
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Digital Signal Processing Engineer Intern

San Jose, CA 34 days ago $83,200–$124,800
Actively hiring Confirmed live yesterday High trust Below market
MATLAB Digital Signal Processing Machine Learning Neural Networks RNN LSTM RF Modeling Wireless Communications 5G 6G Adaptive Algorithms LS LMS RLS Gradient Descent Non-linear System Analysis RFSoC Versal
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Principal SoC Architect

San Jose, CA 34 days ago $232,000–$348,000
Actively hiring Confirmed live 2 days ago High trust Above market
SoC Architecture System Architecture Micro-architecture Power Management Low Power Design Silicon Emulation Verification Floorplan Datacenter Edge AI Automotive Networking Embedded Systems
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Power Analysis and Optimization Engineer

Austin, TX 34 days ago $115,760–$173,640
Actively hiring Confirmed live yesterday High trust Below market
x86 SoC C/C++ Python Perl Linux Windows Server Power Management Firmware BIOS PCIe Hardware Architecture NIDAQ Oscilloscope Logic Analyzer Protocol Analyzer Validation Methodologies Debug Binning Strategy
Hybrid
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Senior Silicon Design Verification Engineer

Austin, TX 34 days ago $144,800–$217,200
Actively hiring Confirmed live 2 days ago High trust Competitive pay
SystemVerilog UVM Verilog C++ C SystemC TLM RTL ASIC Verification Linux Windows Perl Ruby Shell Scripting Makefiles HLS Simulation Graphics Pipeline Architecture
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Technical Fellow, High-Speed Interconnect & Optics

Santa Clara, CA 34 days ago $284,800–$427,200
Actively hiring Confirmed live yesterday High trust Above market
Signal Integrity (SI) Power Delivery Network (PDN) ASIC SerDes Silicon Photonics Co-Packaged Optics (CPO) Co-Packaged Copper (CPC) On-Board Optics (OBO) Firmware FEC Lab Bring-up Validation Debug PCI-SIG IEEE
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Senior Engineer, Power Systems Design - Data Center GPU

Austin, TX 34 days ago $133,200–$199,800
Actively hiring Confirmed live 2 days ago High trust Below market
PCB Design OrCAD Allegro SiWave Simplis PSpice HSpice Schematic Capture Analog Circuit Modeling Control Theory Closed Loop Compensation Stability Analysis Oscilloscope Function Generator PMIC SVIx
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AI / ML DFT Project Lead

Santa Clara, CA 34 days ago $232,000–$348,000
Actively hiring Confirmed live yesterday High trust Above market
DFT DFD AI ML Python PyTorch TensorFlow scikit-learn Tcl Perl Shell Scripting MLOps CI/CD RAG EDA Tools ASIC Design VLSI APIs Model Context Protocol (MCP)
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CPU Microarchitecture & Cache RTL Design Engineer

Fort Collins, CO 34 days ago $144,800–$217,200
Actively hiring Confirmed live yesterday High trust Below market
VLSI RTL Design Verilog HDL Cache Architecture CPU Coherency NoC SoC Scripting Microarchitecture Timing Closure Design for Test Physical Design Routing Fabric
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Principal Memory Sub-System Validation Lead

Santa Clara, CA 35 days ago $229,600–$344,400
Actively hiring Confirmed live yesterday High trust Above market
HBM DDR LPDDR Post-Silicon Validation SoC Memory Architecture Memory Controller PHY Design JTAG I2C Python C/C++ Linux Windows Machine Learning High-Performance Computing PVT Shmoo Characterization DRAM
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Senior Salesforce Service Cloud Developer

San Jose, CA 35 days ago $149,760–$224,640
Actively hiring Confirmed live yesterday High trust Competitive pay
Salesforce Service Cloud Apex Lightning Web Components Flows CRM Analytics Einstein Analytics Agentforce APIs GitHub CI/CD Middleware Data Management Release Management
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NPU Compiler Engineer

San Jose, CA 35 days ago $172,000–$258,000
Actively hiring Confirmed live yesterday High trust Competitive pay
C++ Python MLIR Compiler Architecture NPU Vitis-AI Ryzen-AI Machine Learning Frameworks SystemC RTL Simulators Graph Compilers Object-Oriented Programming
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Lead Design Verification Engineer, Memory Controller

San Jose, CA 35 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday High trust Above market
System Verilog UVM Formal Verification DDR5 LPDDR6 HBM4 Synopsys VCS Cadence Xcelium Assertion-Based Verification Gate-Level Simulation Power-Aware Verification VC Formal JasperGold Questa Formal Network-on-Chip Regression Management
8+ yrs exp
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Senior Staff Pre Silicon Verification Engineer

San Jose, CA 35 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday High trust Above market
System Verilog UVM Formal Verification DDR5 LPDDR6 HBM4 Synopsys VCS Cadence Xcelium Assertion-Based Verification Metric-Driven Verification Gate-Level Simulation Power-Aware Verification VC Formal JasperGold Questa Formal NoC Silicon Debug Regression Management
8+ yrs exp
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Advanced Packaging Technologist, Mechanical Modeling

Austin, TX 35 days ago $145,360–$218,040
Actively hiring Confirmed live yesterday High trust Competitive pay
Mechanical Modeling Multi-physics Modeling FEA System-Technology Co-Optimization (STCO) SMT Electro-thermal Electro-optical Failure Analysis Reduced-order Modeling DOE
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Advanced Package Thermal Technologist

Austin, TX 35 days ago $145,360–$218,040
Actively hiring Confirmed live yesterday High trust Competitive pay
Thermal Modeling CFD System-Technology Co-Optimization (STCO) Electro-thermal Electro-optical SMT Processes Reduced-order Modeling DOE
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Senior FAE/Field Application Engineer

San Jose, CA 35 days ago $243,920–$365,880
Actively hiring Confirmed live yesterday High trust Above market
x86 CPU GPU Linux Cloud Computing High-Performance Computing Networking Software Defined Storage Data Analytics Databases UEFI Firmware FPGA Performance Profiling Benchmarking
Hybrid
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RTL Design Engineer, Power Design

Austin, TX 35 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday High trust Above market
Verilog SystemVerilog Python Tcl Perl Ruby Makefile ASIC Design RTL Simulation Linting Synthesis Power-Aware Verification AMBA AXI AHB SoC Microarchitecture Low-Power Design
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Lead Physical Design Engineer

Santa Clara, CA 35 days ago $210,400–$315,600
Actively hiring Confirmed live yesterday High trust Above market
ASIC Physical Design Static Timing Analysis clock-tree synthesis ECO PPA Optimization Synopsys ICC2 Fusion Compiler Cadence Innovus PrimeTime RedHawk Formality Conformal TCL Python Perl Pandas Machine Learning Formal Verification Physical Verification
Save