NPU Compiler Engineer

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$172,000–$258,000 / yr
Posted
9 days ago
Freshness
Confirmed live yesterday
Closes
Sep 22, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $206k
This role $215k
$139k most similar roles pay here $271k

This role pays more than 65% of similar roles. Most pay $176,600–$235,750 — the shaded band above. At the midpoint, this role pays about $215k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 374 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 374 roles with salary data.

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At a glance

TL;DR · NPU Compiler Engineer

As an NPU Compiler Engineer within the AI group, you will join a core team of specialists to develop next-generation compiler tools for Vitis-AI and Ryzen-AI software platforms. You will be responsible for designing and implementing compiler passes in the MLIR framework to optimize machine learning networks on NPUs featuring proprietary AI-engine architecture. Your daily work involves analyzing and debugging functional and performance issues, building infrastructure for regression suite analysis, and applying a data-minded approach to target optimizations. The role requires proficiency in C++, Python, and the MLIR framework, alongside deep knowledge of compiler architecture, intermediate representations, and NPU hardware components like memory hierarchy and parallel execution. You will also utilize SystemC and RTL simulators while leveraging AI agents for debugging and test generation to enhance performance across various machine learning frameworks.

What you'll do

  • Design and implement compiler passes in the MLIR framework to optimize AI workloads on NPUs.
  • Analyze and debug functional and performance issues within the compiler tool stack.
  • Build infrastructure for the analysis and debugging of regression suites.
  • Integrate AI and coding agents into compiler development, debugging, test generation, and performance analysis.
  • Apply a data-driven approach to target optimization efforts for machine learning networks.
  • Research and implement more efficient methods to resolve existing technical issues.
  • Develop and maintain technical relationships with internal peers and external partners.

What we're looking for

  • Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.
  • Strong object-oriented programming background (C/C++ preferred).
  • Deep hands-on experience with MLIR optimization and lowering passes (preferred).
  • Strong knowledge of compiler architecture, intermediate representations, transformation passes, and optimization pipelines (preferred).
  • Strong understanding of NPU architecture, including parallel execution, memory hierarchy, caches, registers, synchronization, and occupancy (preferred).
  • Strong C++ and Python skills (preferred).
  • Experience with AI compilers, tensor or graph compilers, and machine learning frameworks (preferred).
  • Experience with debugging using SystemC and RTL simulators (preferred).

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