Senior Silicon Design Verification Engineer

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$144,800–$217,200 / yr
Posted
7 days ago
Freshness
Confirmed live yesterday
Closes
Sep 23, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $201k
This role $181k
$132k most similar roles pay here $262k

This role pays less than 61% of similar roles. Most pay $173,906–$227,500 — the shaded band above. At the midpoint, this role pays about $181k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 375 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 375 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Senior Silicon Design Verification Engineer

As a Sr Silicon Design Verification Engineer, you will join the team responsible for planning, developing, and executing verification activities for new and existing features within graphics processor IP. You will collaborate with cross-functional architecture, hardware, and firmware teams to develop comprehensive test plans that account for interactions across hardware, firmware, software drivers, and system-level use cases. Your daily work involves creating directed and constrained-random tests, debugging failures, and improving verification methodologies to ensure high-quality silicon. The role requires proficiency in SystemVerilog, Verilog, C, C++, and scripting languages like Perl, Ruby, or shell. You will utilize UVM-based testbenches in Linux and Windows environments while addressing challenges related to graphics pipeline architecture, video codec technologies, and multimedia systems. You will also manage coverage metrics and automate engineering workflows within distributed compute environments.

What you'll do

  • Plan, develop, and execute verification activities for new and existing graphics processor IP features.
  • Create comprehensive verification test plans covering hardware, firmware, software drivers, and system-level use cases.
  • Estimate effort required for verification development, including test creation and environment updates.
  • Develop directed and constrained-random verification tests to ensure high-quality silicon.
  • Debug test failures and identify root causes in collaboration with RTL and firmware engineers.
  • Monitor functional and code coverage metrics to enhance verification content and meet objectives.
  • Contribute to improvements in verification methodologies to increase quality, efficiency, and scalability.

What we're looking for

  • Bachelor's, Master's, or equivalent practical experience in Computer Engineering, Electrical Engineering, or a related technical field.
  • Experience in processor architecture, digital design, and verification methodologies.
  • Ability to communicate technical concepts effectively and collaborate with geographically distributed teams.
  • Experience with IP-level ASIC verification (preferred).
  • Experience debugging RTL and firmware using simulation and verification tools (preferred).
  • Knowledge of Verilog, SystemVerilog, C, and C++ (preferred).
  • Experience working with UVM-based testbenches in Linux and Windows environments (preferred).
  • Familiarity with scripting languages such as Perl, Ruby, shell scripting, or Makefiles (preferred).

More like this

Similar roles

GPU Design Verification Engineer, Shader Core

Amd

San Diego, CA 29 days ago $144,800–$217,200
UVM SystemVerilog Verilog C C++ RTL SystemC TLM Linux Perl Ruby Shell Scripting Makefiles ASIC Design Verification Simulation Hardware Verification GPU Architecture High-Level Synthesis
Hybrid

Emulation Verification Engineer

Amd

Austin, TX 20 days ago $144,800–$217,200
UVM System Verilog Verilog C++ C Python Perl x86 Assembly FPGA Emulation ZeBu HAPs Veloce Linux Windows UEFI RTL Makefile Simulation

ASIC Design Verification Engineer

Amd

Austin, TX 105 days ago $178,400–$267,600
System Verilog UVM SystemC Verilog C++ Formal Verification ASIC Design RTL Linux Windows OOP Simulation Functional Coverage Digital Design Computer Architecture

Senior ASIC Design Verification Engineer

SpaceX

Irvine, CA 79 days ago $165,000–$260,000
ASIC Design Verification UVM OVM VMM RTL Python Constrained Random Verification test bench development Pre-silicon Verification Post-silicon Validation Chip Bring-up Object-Oriented Programming Scripting Functional Coverage
5+ yrs exp