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Verilog SystemVerilog VHDL Python Perl SPICE HSPICE CMOS FinFET Cadence Synopsys EDA Tools Digital Circuit Design SRAM Timing and Delay Analysis Power Management Monte Carlo SerDes Object-Oriented Programming Operating Systems +15 more Show less

RTL Design HDL SystemVerilog Verilog VHDL UVM Digital Design VLSI Design Synthesis Static Timing Analysis STA Computer Architecture SoC SRAM Design Physical Design P&R Timing Closure Python C++ C Perl TCL Linux Testbench Creation Functional Coverage CMOS Transistors Power and Performance Optimization +22 more Show less

VLSI Physical Design Floorplanning Place and Route Static Timing Analysis Clock Tree Synthesis Physical Verification DRC LVS Power Integrity IR Drop Analysis RC Extraction Digital Design Mixed-Signal Design Computer Architecture ICC2 PrimeTime dc_shell Innovus SeaHawk Python C++ C Perl TCL Linux SKILL Make Design Compiler Scheme +25 more Show less

Mixed Signal Design CMOS Analog Circuit Design FinFET Analog Simulation Layout and Physical Design High-Speed Circuit Design Verilog SystemVerilog VHDL Python Perl SPICE HSPICE Simulink Cadence Virtuoso Synopsys PLL DAC ADC Bandgaps Oscilloscopes Spectrum Analyzers +17 more Show less

Design for Test (DFT) Digital Design Static Timing Analysis (STA) ATPG Boundary Scan JTA Memory BIST Logic BIST Streaming Scan Network Perl TCL C C++ Python Synopsys TetraMAX Cadence Modus Linux +13 more Show less

ECAD PCB Design Schematic Capture Physical Layout High-density Routing Circuit Board Design Component Placement Routing Electrical Engineering +4 more Show less

SystemVerilog UVM PCIe CXL Python Perl ASIC Design Computer Architecture RTL Waveform Debug C Functional Testing Test Plans +8 more Show less

SystemVerilog UVM PCIe CXL Python Perl ASIC Design Computer Architecture RTL Waveform Debug C Functional Testing Automation +8 more Show less

VLSI Design AI HW/SW Co-Design Python PyTorch SystemVerilog C++ High-Level Synthesis (HLS) Machine Learning Quantization Tensor Decomposition Digital VLSI Circuits Hardware Accelerator Architecture Tapeout +8 more Show less

AI GPU Computing EDA Formal Methods Python C++ CUDA LLMs Generative AI Reinforcement Learning Logic Synthesis Physical Design VLSI Parallel Programming Formal Verification +10 more Show less

Model Based System Engineering Cameo Magic Draw Data Bus Design Capital Enterprise Microsoft Office Suite Requirements Analysis Integration and Verification Test Execution Electrical Engineering Computer Engineering Vehicle Testing System Design +7 more Show less

Model Based System Engineering Cameo Magic Draw Data Bus Design Capital Enterprise Microsoft Office Suite Requirements Analysis Integration and Verification Electrical Engineering Computer Engineering Software Requirements Test Plans Test Execution Vehicle Testing +8 more Show less

Figma Carbon Design System HTML CSS After Effects Lottie UI/UX Design Thinking Responsive Design Accessibility Motion Design front‑end development +7 more Show less

CMOS Integrated Circuit Design RF Design Digital Design Cadence EDA Physical Design Schematic Design Verification Quantum Computing Communication Theory Physics High Performance Computing AI Hybrid Cloud +10 more Show less

HTML CSS JavaScript Python Go Node.js Figma Storybook Git Kubernetes OpenShift Agile Accessibility Design Systems Claude Code Cursor Copilot v0 +13 more Show less

Figma HTML CSS JavaScript React Interaction Design Prototyping Design Systems Data Visualization Accessibility Large Language Models Software Agents Human Computer Interaction +8 more Show less

Physical Design Static Timing Analysis STA Power Analysis Logic Synthesis Equivalence Checking Placement Routing Python Perl Tcl Make Cadence Synopsys Siemens AI ML RTL GDSII +14 more Show less

Quantum Computing Circuit Design RF Integrated Circuits Superconducting Circuits RF/Microwave Components Vector Network Analyzers High Performance Computing Hybrid Cloud +3 more Show less

RFIC Design Analog IC Design Mixed-Signal Design Verilog SystemVerilog Python MATLAB Perl Tcl Shell Cadence HFSS RTL Coding Static Timing Analysis DFT SerDes PCIe USB DDR HBM ADC DAC PLL 5G 6G mmWave Signal Processing S-parameters Filter Design Digital Pre-distortion Power Delivery Network SIPI +27 more Show less

C C++ Python Verilog SystemVerilog Perl Matlab Vulkan UVM RTL ASIC SoC DSP LTE 5G Wi-Fi Linux Windows Machine Learning +14 more Show less