PCIe Design Verification Intern

Nvidia

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Work type
On-site
Location
Austin, TX
Employment
Full-time
Posted
2 days ago
Freshness
Confirmed live today

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How this pay compares to similar roles

Similar $175k
$126k most similar roles pay here $228k

This listing doesn't post a salary. Most similar roles pay $136,875–$214,000.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1404 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1052 roles with salary data.

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At a glance

TL;DR · PCIe Design Verification Intern

The PCIe Design Verification Intern will join a global engineering team to verify PCIe and CXL hardware functionality and performance. Working within an SV/UVM test-bench, the intern will develop directed and random diagnostics to validate the processor Instruction Set Architecture, reference models, C simulation models, RTL models, HW emulators, and real hardware. Key responsibilities include coding coverage or checkers, enabling new features, performing simulation performance analysis, and automating engineering processes. The role requires writing and reviewing validation test plans while debugging diagnostics across various platforms. Candidates must possess exposure to computer architecture, ASIC design, or verification methodology. Required technical skills include SystemVerilog, Object Oriented programming, and scripting experience in Python or Perl. This position focuses on the technical verification of high-performance interconnect protocols and hardware components.

What you'll do

  • Verify PCIe and CXL hardware functionality and performance using SV/UVM test-benches.
  • Develop directed and random diagnostics to validate processor ISA, reference models, and RTL models.
  • Write and review comprehensive validation test plans.
  • Debug diagnostics across various platforms including hardware emulators and real hardware.
  • Code coverage metrics and checkers to ensure design verification goals are met.
  • Measure, analyze, and improve simulation performance.
  • Automate engineering processes and tools using Python or Perl scripts.
  • Enable new hardware features through coding and debugging.

What we're looking for

  • Pursuing a BS or MS in Computer Science, Computer Engineering, Electrical Engineering, or a related degree.
  • Exposure to computer architecture, ASIC design, or verification methodology.
  • Familiarity with Object Oriented programming and/or SystemVerilog.
  • Previous scripting experience in Python or Perl.
  • Experience with directed and random functional testing including writing test plans (preferred).
  • Familiarity with automation of build, test, and other engineering processes (preferred).
  • Experience with hardware simulation and waveform debug tools (preferred).

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