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HSPICE Python Perl TCL Spectre Cadence Virtuoso FinFET GAA SOI DRC LVS Design for Manufacturability Silicon Debug Voltage Scaling Power Gating Advanced Technology Nodes SRAM Compiler Development +12 more Show less

Altium Designer Python SPI I2C DDR Ethernet MAC and PHY interfaces FPGAs SERDES microprocessor selection microcontroller configuration high speed board design component selection schematic capture embedded software development timers interrupts hardware peripherals ADCs +13 more Show less

Altium Designer Python SPI I2C DDR Ethernet FPGA SERDES microprocessor microcontroller high speed board design component selection schematic capture +8 more Show less

Spice Perl Tcl Make RTL Logic Synthesis Verification Place and Route Design-for-test(DFT) Analog Circuit Design Mixed-Signal Analog Design Digital Circuit Design Security Attacks Detection EM/IR Analysis Static Timing Analysis Noise Analysis Loop Stability Analysis Monte-Carlo Analysis +13 more Show less

Perl Python Tcl Make SPICE Liberty models Deep Learning GPU Parallel Computing CI/CD +5 more Show less

Cadence_Virtuoso Python Linux Verilog SystemVerilog Analog-to-Digital_Converters Digital-to-Analog_Converters Phase-Locked_Loops RF_Components Cryogenic_Circuit_Design Low_Temperature_Measurements Semiconductor_Behavior ASIC_Bring-Up Characterization Signal_Integrity Documentation +11 more Show less

Matlab Simulink Simplis Spice VerilogAMS HSpice Spectre Primesim XACT Cadence_Virtuoso Allegro Perl Tcl Python Skill ANSYS Sigrity +12 more Show less

Spice Perl Tcl Make RTL Logic Synthesis Verification Place and Route Design-for-test(DFT) Analog Circuit Design Mixed-Signal Analog Block Design Digital Circuit Design Security Attacks Detection Circuits EM/IR Analysis Static Timing Analysis Noise Analysis Loop Stability Analysis Monte-Carlo Analysis +13 more Show less

Python C++ PyTorch LangChain LangGraph EDA VLSI ASIC AI/ML Deep Learning Agentic Systems Autonomous Optimization CI/CD +8 more Show less

Perl Python Verilog VHDL SPICE Tcl Make RTL Simulation tools Waveform debugging tools ASIC design flow Custom circuit design SRAM design Transistor-level circuit design Power analysis Timing characterization Circuit verification Scripting languages Automation methods +14 more Show less

SPICE Perl Tcl Make DRC LVS EM/IR noise high sigma variation automation algorithms scripting simulation tools deep submicron process issues standard cell libraries custom ROMs flip flops level shifters math cells register files SRAM +15 more Show less

Spice Python Perl Tcl Make RTL Logic Synthesis Verification Auto Place and Route STA PnR DRC LVS Power Gating Multi-Vt Post-Silicon Characterization Custom Circuit Design Semi-Custom Circuit Design +13 more Show less