Senior Mixed Signal Circuit Design Engineer

Nvidia

Confirmed live today Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $168,000–$264,500 / yr
Employment: Full-time
Posted: 15 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k

This role $216k

$135k $278k

below market most similar roles pay here above market

This role pays more than 77% of similar roles. Most pay $165,825–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Mixed Signal Circuit Design Engineer

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The Senior Mixed Signal Circuit Design Engineer joins the Mixed Signal design team to develop next generation NVLINK. This role involves the design, simulation, and verification of high-speed interface circuits, including high speed transceivers and high frequency PLLs. You will lead mask designers, provide mentorship for floorplan and layout design, and support lab characterization of silicon. The work focuses on taking innovative integrated circuit designs at data rates of 100Gbps and higher from concept through silicon characterization in deep submicron CMOS. Required skills include experience with Data Converters, Tx, Rx, CDR, and PLL for high-speed IO interfaces using Cadence custom design tools, circuit simulators, and timing analysis tools. Knowledge of Verilog, Matlab, Nanotime, signal integrity, and power integrity is also helpful.

Skills

Mixed Signal Design CMOS Cadence Verilog Matlab PLL Transceivers CDR Data Converters High-Speed IO Timing Analysis Signal Integrity Power Integrity Silicon Characterization Lab Instrumentation Nanotime

What you'll do

Design and implement high-speed interface circuits and mixed-signal circuits.
Create high-speed transceivers and high-frequency PLLs.
Perform simulation and verification of mixed-signal circuits.
Lead mask designers and provide mentorship for floorplan and layout design.
Support lab characterization of silicon and debug circuit issues.
Manage designs from initial concept through implementation and productization.
Address circuit design challenges in deep submicron CMOS processes.

What we're looking for

MS in Electrical Engineering or equivalent experience.
4+ years of design experience in CMOS analog/mixed-signal circuits.
Working knowledge of Cadence custom design tools, circuit simulator, and timing analysis tools.
Extensive design experience in Data Converters, Tx, Rx, CDR, and PLL for high-speed IO interfaces.
Validated experience in leading and mentoring designers.
Proven experience in silicon bring-up, debugging, and use of lab instrumentation.
Knowledge of system level timing budget, signal integrity, and power integrity (preferred).

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