Broadcom

280 open roles Visit website

Employer

About Broadcom

Published by FindRole · most recent listing · Methodology

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

Most-posted roles

How Broadcom posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

60.4%
of open roles publish a salary range
96.9%
of its listings are still up 30 days after appearing
28.4%
of those closed while an identical title stayed posted
59
listings we saw close in the last 90 days

Open roles are up 22 from a week ago (258 then).

More than half of Broadcom’s listings are still up at the end of our 87-day observation window, so we cannot yet say how long a typical one lasts.

Estimated over 339 listings, of which 59 closed during the window — listings still up are counted as lasting at least as long as we have seen them, rather than being left out. Leaving them out is what makes a plain average of closed listings read far too short.

The repost figure describes the 81 of this employer’s listings we have watched close since September 2026 — not all of its hiring, and not a rate we project forward. A repost means the listing closed while the same employer had another live listing under the same title: a signal, not a verdict, since two genuinely separate openings can share one title. See the methodology.

Layoffs · WARN filings

Trending down

2,366 workers affected across 8 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

280 total

SoC Integration and Design Engineer

Mendota Heights, MN +2 1 day ago $109,700–$175,500
Actively hiring Confirmed live today Posted today High trust Below market
SoC Architecture SystemVerilog Verilog VHDL AMBA Synthesis Formal Verification CDC DFT Timing Closure Git JIRA DRAM SERDES UART Design Validation
8+ yrs exp

Mechanical Engineer Supporting ASIC Test

Fort Collins, CO +1 4 days ago $121,900–$195,000
Actively hiring Confirmed live today Posted this week High trust Competitive pay
Solidworks Ansys Icepack Ansys Mechanical Python Excel Allegro Thermal Management PCB Design Simulations Profilometry Keyence ATE Test Hardware Mechanical Prototyping
8+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Actively hiring Confirmed live yesterday Posted this week Trusted Competitive pay
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Actively hiring Confirmed live yesterday Posted this week Trusted Competitive pay
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Actively hiring Confirmed live today Posted this week Trusted Competitive pay
Verilog SystemVerilog RTL Design Micro-architecture PCIe CXL AMBA Low-power Design Timing Closure RTL Optimization Asynchronous Clock Domain Crossing Multi-threaded Design Storage Designs Emulation Validation
10+ yrs exp

Principal Physical Verification Engineer

San Jose, CA 4 days ago $143,800–$230,000
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
ASIC Physical Verification DRC LVS ERC PERC DFM ICV Calibre Pegasus Python Tcl Perl Floorplan Tape-out 3nm 2nm 2.5D 3D Chiplet EDA Tools
10+ yrs exp

Agile Leader

Pittsburgh, PA 4 days ago $109,700–$175,500
Actively hiring Confirmed live today Posted this week High trust Below market
Agile Scrum Kanban Lean Mainframe Change Management Sprint Planning Retrospectives Daily Stand-ups Flow Metrics Velocity Cycle Time
8+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 4 days ago $143,800–$230,000
Actively hiring Confirmed live today Posted this week Trusted Competitive pay
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation
10+ yrs exp

Core Distributed Systems Database Engineer

Promontory D, CA 4 days ago $121,900–$195,000
Actively hiring Confirmed live today Posted this week High trust Competitive pay
Kubernetes Distributed Systems Java C++ Go Python VMware vSphere TCP/IP Automated Testing Fault Injection Datastore Services
8+ yrs exp

Solution Engineer, ValueOps

Remote (OH) +33 4 days ago $110,800–$177,300
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
Project & Portfolio Management Agile SAFe Jira ServiceNow Clarity Planview Apptio FinOps NetOps Automation Solution Engineering Proof of Value Business Requirements Infrastructure Portfolio Management
10+ yrs exp Remote

Design Verification Engineer

San Jose, CA 5 days ago
Actively hiring Confirmed live yesterday Posted this week High trust
System Verilog UVM OVM C++ SystemC Perl RTL Verification ASIC Design Verification FPGA Emulators Coverage Assertions C Scripting
10+ yrs exp

Memory System Designer and Place and Route Engineer

Austin, TX 5 days ago $109,700–$175,500
Actively hiring Confirmed live yesterday Posted this week High trust Below market
Verilog RTL Physical Design STA DRC EM/IR Synthesis Python Logical Equivalency Memory Subsystem Design Gate Netlist Synthesis Automation Scripts
8+ yrs exp

ASIC Package Design Project Manager

Fort Collins, CO 5 days ago $129,400–$207,000
Actively hiring Confirmed live today Posted this week High trust Below market
Package Design ASIC SerDes HBM DDR5 Signal Integrity Power Integrity DFx Thermal Modeling Automation Project Management Layout Simulations RF Microwave ADC DAC
10+ yrs exp

R&D Senior Engineer Software

San Jose, CA 6 days ago
Actively hiring Confirmed live today Posted this week High trust
C++ C Linux Yocto OpenBMC ZephyrOS x86 ARM I2C PMBus AVSbus MDIO PCIe SPI USB SERDES Redfish DMTF MCTP PLDM SPDM Secure Boot u-boot Root of Trust NIC
5+ yrs exp

Senior Software Engineer, Quality Assurance

Plano, TX 6 days ago $91,100–$146,000
Actively hiring Confirmed live today Posted this week High trust Below market
IBM Assembler z/OS COBOL C++ Python JCL SQL Datacom DB2 IDMS GitHub Endevor Jenkins CI/CD CICS REXX SMP/E ZOSMF VSAM Test Automation ODBC JDBC
5+ yrs exp

R&D Staff Engineer Software

San Jose, CA 6 days ago
Actively hiring Confirmed live yesterday Posted this week High trust
C++ C Linux Yocto OpenBMC ZephyrOS x86 ARM Device Drivers I2C PMBus AVSbus MDIO PCIe SPI USB SERDES Redfish DMTF MCTP PLDM SPDM Secure Boot u-boot Root of Trust Networking
8+ yrs exp

Forward Deployed Engineer, Kubernetes

Remote (TN) 6 days ago $110,800–$177,300
Actively hiring Confirmed live yesterday Posted this week High trust Below market
Kubernetes vSphere Kubernetes Service (VKS) VMware Cloud Foundation (VCF) Terraform Helm GitOps ArgoCD Flux Ray vLLM Apache Spark Apache Flink Apache Kafka RabbitMQ Redis Cassandra ScyllaDB Milvus Qdrant Trino Presto Elasticsearch OpenSearch Triton Inference Server NVIDIA vGPU MIG Cluster API (CAPI) Kubernetes Operators (KPO) Apache Airflow Prefect Dagster Argo Workflows Hadoop HDFS YARN Pulsar Red Hat OpenShift Amazon EKS Google GKE Azure AKS Rancher RKE/RKS
10+ yrs exp Remote

RTL IC Design Engineer

Colorado Springs, CO +1 6 days ago $101,000–$162,000
Actively hiring Confirmed live today Posted this week High trust Below market
Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Emulation Validation RAID Storage
5+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 6 days ago $121,900–$195,000
Actively hiring Confirmed live today Posted this week High trust Below market
Verilog SystemVerilog RTL Design Micro-architecture PCIe CXL AMBA Low-power Design Timing Closure RTL Optimization Asynchronous Clock Domain Crossing Multi-threaded Design Storage Designs Emulation Validation
8+ yrs exp

IC Design Engineer

Colorado Springs, CO +1 6 days ago
Actively hiring Confirmed live yesterday Posted this week High trust
Physical Design RTL to Tape-out Synthesis Physical Verification Timing Closure STA EM/IR Analysis Place and Route Clock Tree Synthesis Floor-planning Layout TCL Perl EDA Tools Flow and Methodology Development
8+ yrs exp