IC Design Engineer

Broadcom

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
Colorado Springs, COSan Jose, CA
Salary
$143,800–$230,000 / yr
Employment
Full-time
Posted
4 days ago
Freshness
Confirmed live today
Closes
Apr 21, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k
This role $187k
$133k $240k
below market most similar roles pay here above market

This role pays more than 50% of similar roles. Most pay $162,000–$229,650 — the blue band above. At the midpoint, this role pays about $187k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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At a glance

TL;DR · IC Design Engineer

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The IC Design Engineer will join the Data Center Solutions Group to support next generation AI/ML ecosystems through PCIe Switch Products and Enterprise Storage Products. This role involves high-level architecture specification analysis, micro-architecture development, and high-performance RTL implementation. The engineer will use Verilog and SystemVerilog to build designs featuring asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations, pipelining, and multi-threaded designs. Key responsibilities include integrating third-party IP, performing RTL optimization for timing closure, and debugging RTL with cross-functional teams like Verification, Software, Firmware, and Emulation Engineering. The position requires providing lab support for silicon during validation. Desired technical knowledge includes PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe Switch designs within a data center environment.

Skills

Verilog SystemVerilog RTL Design PCIe CXL AMBA Micro-architecture Timing Closure Low-power Design Asynchronous Clock Domain Crossing RAID Storage Designs Emulation Validation

What you'll do

  • Analyze and author high-level architecture specifications.
  • Develop and document micro-architecture designs.
  • Implement high-performance Verilog/SystemVerilog RTL based on design specifications.
  • Manage asynchronous clock domain crossings, multiple power domains, and low-power design.
  • Optimize RTL to achieve timing closure.
  • Debug RTL issues and provide robust technical solutions.
  • Support cross-functional engineering teams with RTL design issues.
  • Provide lab support for silicon during the validation process.

What we're looking for

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent Engineering degree.
  • 12+ years of relevant industry experience.
  • In-depth knowledge of implementation and supporting RTL designs using Verilog/SystemVerilog.
  • Experience with high-performance RTL implementation including asynchronous clock domain crossings, multiple power domains, and low-power design.
  • Ability to perform high-level architecture specification analysis and micro-architecture development.
  • Skill in converging designs to timing closure using RTL optimization strategies.
  • Experience with PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe switch designs (preferred).
  • Ability to work in person as remote work is not allowed.

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