IC Design Engineer

Broadcom

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
Colorado Springs, COSan Jose, CA
Salary
$143,800–$230,000 / yr
Employment
Full-time
Posted
4 days ago
Freshness
Confirmed live today
Closes
Apr 21, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k
This role $187k
$133k $240k
below market most similar roles pay here above market

This role pays more than 50% of similar roles. Most pay $162,000–$229,650 — the blue band above. At the midpoint, this role pays about $187k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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At a glance

TL;DR · IC Design Engineer

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The IC Design Engineer joins the Data Center Solutions Group to develop next generation AI/ML ecosystems and enterprise storage products. This role involves high-level architecture specification analysis, micro-architecture development, and high-performance RTL implementation. The engineer will build designs using Verilog and SystemVerilog, addressing complex requirements such as asynchronous clock domain crossings, multiple power domains, low-power design, deep computations, pipelining, and multi-threaded designs. Key responsibilities include converging designs to timing closure through RTL optimization, debugging robust solutions, and collaborating with verification, software, firmware, and emulation teams. The position requires expertise in integrating third-party IP and providing lab support for silicon validation. Relevant domain knowledge includes PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe switch designs to solve infrastructure challenges.

Skills

Verilog SystemVerilog RTL Design Micro-architecture PCIe CXL AMBA Low-power Design Timing Closure RTL Optimization Asynchronous Clock Domain Crossing Multi-threaded Design Storage Designs Emulation Validation

What you'll do

  • Analyze and author high-level architecture specifications.
  • Develop and document micro-architecture designs.
  • Implement high-performance Verilog/SystemVerilog RTL based on design specifications.
  • Manage asynchronous clock domain crossings, multiple power domains, and low-power design.
  • Optimize RTL to achieve timing closure.
  • Debug RTL designs and provide robust technical solutions.
  • Support cross-functional teams with RTL design issues during verification and emulation.
  • Provide lab support for silicon during the validation process.

What we're looking for

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent Engineering degree.
  • 12+ years of relevant industry experience.
  • In-depth knowledge of implementation and supporting RTL designs using Verilog/SystemVerilog.
  • Ability to perform high-level architecture specification analysis, micro-architecture development, and documentation.
  • Experience with asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, and pipelining.
  • Ability to converge designs to timing closure using RTL optimization strategies and robust debugging skills.
  • Experience with PCIe, CXL, AMBA protocols, RAID storage designs, and PCIe switch designs (preferred).
  • Ability to work in person at the office.

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