Apple Inc

3,542 open roles Visit website

Employer

About Apple Inc

Published by FindRole · most recent listing · Methodology

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3542 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2744 roles with salary data.

Most-posted roles

How Apple Inc posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

77.5%
of open roles publish a salary range

Layoffs · WARN filings

Trending down

1,074 workers affected across 15 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

3,542 total

CAD Engineer, Custom EMIR Methodology

San Diego, CA 45 days ago $142,300–$263,300
Actively hiring Confirmed live yesterday Low trust Competitive pay
EM/IR Analysis Python Perl C/C++ CAD EDA Layout Design Simulation Extraction Physical Verification Circuit-design Automation
3+ yrs exp

CAD Engineer, Custom EMIR Methodology

Beaverton, OR 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
3+ yrs exp

CAD Engineer, Custom EMIR Methodology

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday Low trust
EM/IR Analysis Python Perl C/C++ Layout Design Simulation Extraction Physical Verification Circuit Verification Automation
3+ yrs exp

Virtuoso Custom CAD Engineer

Sunnyvale, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Low trust Above market
Cadence Virtuoso Python Unix Linux SKILL Perl Tcl DFII VXL PCELLs CDFs EDA Tools Revision Control Automation
10+ yrs exp

Virtuoso Custom CAD Engineer

San Diego, CA 45 days ago $175,000–$308,500
Actively hiring Confirmed live yesterday Low trust Above market
Cadence Virtuoso Python SKILL Tcl Perl Unix Linux VXL PCELLs CDFs EDA Tools Revision Control Automation DFII
10+ yrs exp

Virtuoso Custom CAD Engineer

Beaverton, OR 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
Cadence Virtuoso Python SKILL Tcl Perl Unix Linux DFII VXL PCELLs CDFs EDA Tools Revision Control Automation
10+ yrs exp

Virtuoso Custom CAD Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
Cadence Virtuoso Python SKILL Tcl Perl Unix Linux VXL PCELLs CDFs DFII EDA Tools Revision Control Automation
10+ yrs exp

GPU Performance Modeling Engineer

San Diego, CA 45 days ago $142,300–$263,300
Actively hiring Confirmed live 2 days ago Low trust Competitive pay
C++ C SIMD Performance Modeling Verilog VHDL OpenGL OpenCL DirectX Metal Design Verification Scripting
3+ yrs exp

GPU RTL Design Engineer

San Diego, CA 45 days ago $142,300–$263,300
Actively hiring Confirmed live 2 days ago Trusted Competitive pay
System Verilog HDL SIMD Logic Design Synthesis Timing Analysis Floor Planning PNR Flow Python Ruby Perl Hardware Performance Analysis Micro-architecture
5+ yrs exp

Operations Data Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago High trust
Python SQL dbt Spark Snowflake Apache Airflow Delta Lake Apache Iceberg Kafka Flink Docker Kubernetes CI/CD DataOps Tableau Streamlit ThoughtSpot RAG Vector Databases GitHub
10+ yrs exp

Gate-level SigEM/SEB/FIT CAD Engineer

San Francisco, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
Electromigration (EM) Static Error Band (SEB) Failure in Time (FIT) Self-Heating Effect (SHE) Thermal Analysis CAD Flow Development Tcl Python Perl Voltus Voltus-Fi RedHawk-SC Totem Physical Design Physical Verification EDA Tools 3DIC 2.5D/3D/3.5DIC AI/ML
10+ yrs exp

Gate-level SigEM/SEB/FIT CAD Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago Trusted
Electromigration (EM) Static Error Band (SEB) Failure in Time (FIT) Self-Heating Effect (SHE) Thermal Analysis CAD Flow Development Tcl Python Perl Voltus Voltus-Fi RedHawk-SC Totem Physical Design Physical Verification EDA Tools 3DIC 2.5D/3D/3.5DIC AI/ML
10+ yrs exp

Gate-level SigEM/SEB/FIT CAD Engineer

San Francisco, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live 2 days ago Trusted Competitive pay
Electromigration (EM) Static Error Band (SEB) Failure in Time (FIT) Self-Heating Effect (SHE) Thermal Analysis Tcl Python Perl Voltus Voltus-Fi RedHawk-SC Totem EDA Tools CAD Flow Development Physical Design Physical Verification 3DIC Sign-off ECO
3+ yrs exp

Gate-level SigEM/SEB/FIT CAD Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday Trusted
Electromigration (EM) Static Error Band (SEB) Failure in Time (FIT) Self-Heating Effect (SHE) Thermal Analysis CAD Flow Development Tcl Python Perl Voltus Voltus-Fi RedHawk-SC Totem Physical Design Physical Verification 3DIC EDA Tools Sign-off ECO
3+ yrs exp

SoC Physical Design Engineer, STA/Timing

Beaverton, OR 45 days ago
Actively hiring Confirmed live yesterday Low trust
STA Timing Closure TCL Python Perl Physical Design ECO SPICE OCV Crosstalk Circuit Modeling Netlist to Tapeout SoC Design
10+ yrs exp

SoC Physical Design Engineer, Electrical Analysis

San Jose, CA 45 days ago $129,300–$194,700
Actively hiring Confirmed live yesterday Trusted Below market
Dynamic IR Signal EM Python ASIC AMS VLSI SPICE Circuit Design Computer Architecture Low Power Architecture Tape-out Sign-off Closure

SoC Physical Design Engineer, Electrical Analysis

Austin, TX 45 days ago
Actively hiring Confirmed live 3 days ago Trusted
Static/Dynamic IR EM Noise Signal EM Python ASIC AMS VLSI SPICE Circuit Design Computer Architecture Low Power Architecture Tape-out Sign-off Closure

SoC Physical Design Engineer, PnR

San Jose, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Low trust Above market
PnR Physical Design Floorplanning Timing Closure GDS2 Netlist Power Distribution Electrical Verification SOC Design Design for Yield Manufacturability Multi-vt Strategies
10+ yrs exp

SoC Physical Design Engineer, STA/Timing

Beaverton, OR 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
STA Timing Closure Physical Design Perl TCL ECO SPICE SoC Circuit Modeling OCV Crosstalk Netlist to Tapeout
3+ yrs exp

SoC Physical Design Engineer, PnR

San Jose, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live 2 days ago Low trust Competitive pay
Physical Design PnR Netlist to GDS2 Floorplanning Clock and Power Distribution Timing Closure Electrical Verification SOC Design Signoff Closure
3+ yrs exp