SoC Physical Design Engineer, Electrical Analysis

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$129,300–$194,700 / yr
Posted
16 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $207k
This role $162k
$113k most similar roles pay here $281k

This role pays less than 79% of similar roles. Most pay $172,500–$241,750 — the shaded band above. At the midpoint, this role pays about $162k versus about $207k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · SoC Physical Design Engineer, Electrical Analysis

As a member of the SoC team, the SoC Physical Design Engineer, Electrical Analysis will drive the electrical analysis and verification of a System on Chip. The role involves performing various electrical analyses at both the block and chip levels, including Static/Dynamic IR, EM, Noise, and Signal EM. This position requires collaborating with CAD and technology teams for flow bring up and validation while working with the implementation team throughout the entire chip design cycle to achieve sign-off closure for tape-out. Candidates should possess knowledge of computer architecture, circuit design, and low power architecture. Required technical skills include Python or other scripting languages for automating and debugging verification flows. Preferred qualifications include experience with ASIC or AMS physical implementation and analysis flow along with a background in circuit design and SPICE.

What you'll do

  • Perform electrical analyses at the block or chip level, including Static/Dynamic IR and EM.
  • Conduct Noise and Signal EM analysis for SoC designs.
  • Work with CAD and technology teams to perform flow bring-up and validation.
  • Drive sign-off closure for tape-out during the entire chip design cycle.
  • Automate and debug verification flows for digital VLSI design using scripting languages like Python.
  • Execute physical implementation and analysis flows for ASIC or AMS designs.

What we're looking for

  • Minimum Bachelor's degree with 0+ years experience.
  • Knowledge of computer architecture, circuit design, and/or low power architecture.
  • Knowledge of scripting or programming skills like Python.
  • Experience with ASIC or AMS physical implementation and analysis flow (preferred).
  • Scripting skills to automate and debug verification flows for digital VLSI design (preferred).
  • Circuit design background and SPICE experience (preferred).

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