Apple Inc

3,542 open roles Visit website

Employer

About Apple Inc

Published by FindRole · most recent listing · Methodology

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3542 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2744 roles with salary data.

Most-posted roles

How Apple Inc posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

77.5%
of open roles publish a salary range

Layoffs · WARN filings

Trending down

1,074 workers affected across 15 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

3,542 total

RTL Design Engineer

Melbourne, FL 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
Verilog SystemVerilog RTL Design Digital Logic Circuits Design Verification SystemVerilog Assertions Python Perl JSON DFT Synthesis Low Power Design CDC RDC LEQ UPF ECO Digital Signal Processing GenAI

SoC Test Engineer

San Diego, CA 45 days ago $137,500–$250,700
Actively hiring Confirmed live 3 days ago Trusted Competitive pay
ATE VLSI C C++ Perl Visual Basic Design for Test Semiconductor Manufacturing Oscilloscope Logic Analyzer Teradyne UFlex Advantest 93k SoC
3+ yrs exp

SoC Test Engineer

Cupertino, CA 45 days ago $144,600–$263,800
Actively hiring Confirmed live yesterday Trusted Competitive pay
ATE VLSI C C++ Perl Visual Basic Design for Test Semiconductor Manufacturing Teradyne UFlex Advantest 93k Oscilloscope Logic Analyzer SoC Test Methodology
3+ yrs exp

SoC Test Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday Trusted
ATE VLSI C C++ Perl Visual Basic Design for Test Semiconductor Manufacturing Teradyne UFlex Advantest 93k Oscilloscope Logic Analyzer SoC Test Methodology
3+ yrs exp

Circuits Implementation Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday High trust Above market
SoC Design SRAM Design Custom Circuit Design Layout Memory Hierarchy Scripting Nanometer Device Physics
3+ yrs exp

RTL Design Engineer

Cary, NC 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
Verilog SystemVerilog RTL Design Digital Signal Processing Python Perl JSON DFT Synthesis UPF CDC RDC LEQ ECO Low Power Design SystemVerilog Assertions GenAI

RTL Design Engineer

San Diego, CA 45 days ago $122,700–$214,300
Actively hiring Confirmed live 2 days ago Trusted Below market
Verilog SystemVerilog RTL Design DSP Digital Logic Formal Verification Static Timing Analysis Synthesis design-for-test (DFT Python Perl Hardware-Software Co-design Clock-Domain Crossing Low-Power Design Assertions

Physical Design Engineer

Cupertino, CA 45 days ago $129,300–$225,300
Actively hiring Confirmed live 2 days ago Trusted Competitive pay
Physical Design RTL GDSII Floor-planning Place and Route STA LVS DRC Verilog Perl Tcl Synthesis Physical Verification SoC Architecture

Physical Design Engineer

Cupertino, CA 45 days ago $129,300–$225,300
Actively hiring Confirmed live yesterday Trusted Competitive pay
Physical Design RTL GDSII Floor-planning Place and Route STA LVS DRC Verilog Perl Tcl Synthesis Physical Verification SoC Architecture

Custom Circuits Design Verification Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago Trusted
System Verilog Verilog RTL Python Perl Digital Simulation Functional Coverage Code Coverage Assertion Methodology FPGA Emulation ESPCV LEC DFT ATPG MBIST Revision Control SRAM Register File
3+ yrs exp

DRAM Design Validation Engineer

Cupertino, CA 45 days ago $175,500–$311,700
Actively hiring Confirmed live 2 days ago High trust Above market
DRAM SoC DDR LPDDR DDR-PHY Memory Controller C C++ DRAM Simulation Failure Analysis Computer Architecture Power Integrity TSV POP Software Debug
5+ yrs exp

Formal Verification Engineer

Cupertino, CA 45 days ago $115,773–$194,700
Actively hiring Confirmed live yesterday High trust Below market
Formal Verification SoC CPU GPU Hardware Specification Scripting Micro-architecture Security Enclave Design Verification DMA Interconnects Power Management Correct-by-construction

Formal Verification Engineer

Beaverton, OR 45 days ago
Actively hiring Confirmed live 2 days ago High trust
Formal Verification SoC CPU GPU Hardware Specification Scripting Micro-architecture Design Verification Security Enclave DMA Interconnects Power Management Correct-by-construction

Formal Verification Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday High trust
Formal Verification SoC CPU GPU Scripting Hardware Specification Micro-architecture Security Enclave Design Verification DMA Interconnects Power Management

CPU Cache Microarchitect/RTL Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Trusted Competitive pay
RTL Verilog VHDL Microarchitecture C C++ Python Perl Simulators Formal Methods DFT SRAM Coherence Protocols Interconnects Power Management
3+ yrs exp

CPU Cache Microarchitect/RTL Engineer

Waltham, MA 45 days ago $165,800–$292,400
Actively hiring Confirmed live yesterday Trusted Competitive pay
RTL Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects Power Management
10+ yrs exp

CPU Cache Microarchitect/RTL Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
RTL Verilog VHDL Microarchitecture CPU Cache C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects
10+ yrs exp

CPU Cache Microarchitect/RTL Engineer

Beaverton, OR 45 days ago
Actively hiring Confirmed live yesterday Low trust
RTL Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects Power Management
10+ yrs exp

CPU Implementation Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday Low trust
RTL Synthesis place-and-route Perl TCL Logic Design Microarchitecture Physical Design Deep Sub-micron Technologies Device Physics Microprocessor Architecture
3+ yrs exp

CPU Implementation Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago Low trust
VLSI Digital Circuit Design RTL Synthesis place-and-route Perl TCL Microprocessor Architecture Logic Design Deep Sub-micron Technologies Device Physics