Apple Inc

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About Apple Inc

Published by FindRole · most recent listing · Methodology

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3542 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2744 roles with salary data.

Most-posted roles

How Apple Inc posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

77.5%
of open roles publish a salary range

Layoffs · WARN filings

Trending down

1,074 workers affected across 15 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

3,542 total

CPU Physical Design and Integration Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Trusted Competitive pay
Place and Route Physical Design DRC LVS STA EMIR CMOS Python Perl Tcl floor planning Layout Design PDV Clock Design Tapeout IP Integration
3+ yrs exp
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CPU Physical Design Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
RTL-to-GDS Logic Synthesis place-and-route PnR STA Power Analysis Perl TCL Digital Circuits floor-planning Timing Budgeting Physical Integration Verification
10+ yrs exp
Save

CPU Physical Design Engineer

Beaverton, OR 45 days ago
Actively hiring Confirmed live yesterday High trust
RTL-to-GDS Logic Synthesis place-and-route PnR STA Power Analysis Perl TCL Digital Circuits floor-planning Timing Budgeting Physical Integration Verification PPA Memory Macros Library Standard Cells
10+ yrs exp
Save

CPU Physical Design Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday High trust Competitive pay
RTL-to-GDS Logic Synthesis Place-and-Route PnR STA Power Analysis floor-planning Digital Circuits Perl TCL Timing Budgeting Pin-placement PPA Memory Macros Standard Cells
3+ yrs exp
Save

CPU Implementation Lead Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live 2 days ago Low trust Above market
RTL Physical Design Synthesis place-and-route Perl TCL Logic Design Microarchitecture Electrical Analysis Silicon Correlation Deep Submicron Technologies Transistor Level Design
10+ yrs exp
Save

CPU Implementation Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
RTL Synthesis PnR STA TCL Perl Physical Design Logic Design Digital Circuits Power Analysis floor-planning Timing Budgeting PPA Memory Macros Standard Cells
10+ yrs exp
Save

CPU Implementation Engineer

Beaverton, OR 45 days ago
Actively hiring Confirmed live yesterday Low trust
RTL Synthesis place-and-route PnR STA TCL Perl Logic Design Digital Circuits Physical Design Power Analysis floor-planning PPA Timing Budgeting Memory Macros Library Standard Cells
10+ yrs exp
Save

CPU Implementation Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Low trust Competitive pay
RTL Synthesis PnR STA TCL Perl Logic Design Digital Circuits Power Analysis floor-planning PPA Timing Budgeting pin-placement Microarchitecture
3+ yrs exp
Save

CPU Implementation Engineer

Santa Clara, CA 45 days ago $129,300–$194,700
Actively hiring Confirmed live yesterday Low trust Below market
RTL Synthesis PnR STA TCL Perl Logic Design Digital Circuits Power Analysis floor-planning Timing Budgeting PPA Microarchitecture
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CPU Design Verification Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live 2 days ago Low trust Above market
CPU Verification RTL Verilog C C++ Assembly Digital Logic Design Chip Architecture Microarchitecture Assertions Silicon Bring-up
3+ yrs exp
Save

CPU Design Verification Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Low trust Above market
C C++ Verilog Assembly Assertions RTL Digital Logic Design Chip Architecture Microarchitecture Silicon Bring-up
10+ yrs exp
Save

Graphics Power Analysis & Optimization Engineer

Santa Clara, CA 45 days ago $184,700–$324,800
Actively hiring Confirmed live 2 days ago Trusted Above market
Power Analysis RTL ASIC Design Python PowerArtist PTPX Microarchitecture Power Modeling Data Mining Power Management SoC GPU Design
10+ yrs exp
Save

Graphics Power Analysis & Optimization Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live yesterday Trusted
Power Analysis RTL ASIC Design Python PowerArtist PTPX Microarchitecture Power Modeling Data Mining Power Management SoC GPU Design
10+ yrs exp
Save

Graphics Power Analysis & Optimization Engineer

Austin, TX 45 days ago
Actively hiring Confirmed live 2 days ago Trusted
Power Analysis RTL ASIC Design Python PowerArtist PTPX Microarchitecture Power Modeling Data Mining Power Management SoC GPU Design
10+ yrs exp
Save

Graphics Power Analysis & Optimization Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Trusted Competitive pay
Power Analysis RTL Python PowerArtist PTPX Microarchitecture Digital Logic Design GPU Pipeline Power Optimization Scripting SoC
3+ yrs exp
Save

Graphics (GPU) Performance Analysis Engineer

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live 2 days ago Low trust Competitive pay
GPU Architecture Computer Architecture Python C C++ Metal API OpenGL Performance Analysis SoC
3+ yrs exp
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GPU Design Engineer, Memory Hierarchy

Santa Clara, CA 45 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday High trust Competitive pay
Verilog System Verilog HDL Python Perl Ruby GPU Architecture SoC RTL Coding Cache On-chip Interconnect Data Compression Power Optimization Functional Simulation Debug
3+ yrs exp
Save