DRAM Design Validation Engineer

What you'll do

• Define memory controller and PHY requirements to cover DRAM-based corner cases.
• Ensure DRAM simulations meet specific company performance and power requirements.
• Verify that internal and external DRAM silicon meets package-level testing needs.
• Debug RMA materials containing apparent DRAM-related defects.
• Work with vendors to improve DRAM performance and power on integrated systems.
• Drive the roadmaps and specifications of memory vendors for next-generation technology nodes.
• Perform characterization and qualification of LPDDR IO interfaces.

What we're looking for

• PhD, MS, or BS degree with 5+ years of experience in DRAM development.
• Expertise in DRAM cell architectures (preferred).
• Expertise in DRAM memory organization and periphery design for low power (preferred).
• Experience in DRAM simulation (preferred).
• Experience in memory interface verification with understanding of DDR-PHY and Memory Controller (preferred).
• Experience in LPDDR IO characterization and qualification across multiple generations (preferred).
• Knowledge of memory test patterns, reliability, and innovative packaging technologies like POP or TSV (preferred).
• Strong background in computer architecture, C/C++ programming, and hardware/software debugging (preferred).