Physical Design Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
—
Salary
$129,300–$225,300 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $203k
This role $177k
$115k most similar roles pay here $264k

This role pays less than 62% of similar roles. Most pay $168,500–$237,800 — the shaded band above. At the midpoint, this role pays about $177k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · Physical Design Engineer

As a Physical Design Engineer, you will join a wide-ranging group focused on high performance PHY design efforts. You will work closely with architecture, CAD, timing, and logic design teams to manage the physical design process from RTL through the delivery of final GDSII files. Your daily responsibilities include generating block and chip level static timing constraints, building full chip floorplans including pin placement and power grids, and developing low power clock network guidelines. You will perform place and route tasks while implementing ECOs to resolve timing, noise, and EM IR violations. The role requires proficiency in Verilog, Perl, and Tcl scripting, along with expertise in STA methodology and Physical Design verification tools to debug LVS and DRC issues. This position focuses on the technical challenges of high performance PHY and SoC integration.

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Similar roles

Physical Design Engineer

Apple Inc

San Francisco, CA 15 days ago $150,400–$277,600
Physical Design RTL GDSII Floor-planning Place and Route STA LVS DRC Verilog Perl Tcl Synthesis Power Grid SoC Architecture Extraction
3+ yrs exp