This role pays more than
60%
of similar roles. Most pay
$168,500–$215,475
— the shaded band above.
At the midpoint, this role pays about
$192k
versus about
$192k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
623 open roles
on FindRole.
Listed pay typically runs
$148,300–$222,500
across 603 roles with salary data.
Design Verification Engineer — Memory Subsystem
The Design Verification Engineer joins the memory subsystem verification team to manage the complete verification lifecycle for complex digital designs. This individual will develop and execute comprehensive verification strategies, create UVM-based testbenches, write SystemVerilog Assertions, and drive functional and code coverage closure. Daily responsibilities include building reusable components like drivers, monitors, scoreboards, and sequence libraries while performing root-cause analysis on simulation failures using waveform viewers and transaction databases. The role requires proficiency in Verilog, SystemVerilog, UVM, and formal verification methodologies to validate memory controllers, PHY-related logic, and custom interfaces. Candidates must possess expertise in JEDEC specifications and high-performance memory technologies including DDR, LPDDR, and HBM. This position addresses the technical challenges of verifying multi-clock-domain designs, power-aware simulations using UPF, and complex memory operations such as training, refresh, and error-handling across various operating modes.
System Verilog
UVM
SystemC
Verilog
C++
Formal Verification
ASIC Design
RTL
Linux
Windows
OOP
Simulation
Functional Coverage
Digital Design
Computer Architecture