SOC Design Verification Engineer
Qualcomm
Quick summary
Market check
How this pay compares to similar roles
This role pays less than 88% of similar roles. Most pay $168,500–$217,700 — the blue band above. At the midpoint, this role pays about $152k versus about $193k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$218,400 across 551 roles with salary data.
Most-posted roles
At a glance
The SOC Design Verification Engineer – Data Center Solutions joins the Data Center SoC Verification team to verify next-generation SoCs for AI, high-performance computing, and cloud infrastructure. The engineer develops comprehensive verification plans, designs scalable System Verilog and UVM-based environments, and creates directed and constrained-random test scenarios. Key responsibilities include developing assertions, functional coverage models, and checkers while debugging RTL and testbench issues to ensure first-silicon success. The role requires proficiency in System Verilog, UVM, C, Assertion-Based Verification, and Coverage-Driven Verification. Candidates will work on complex features including multi-core CPUs, cache coherency, DDR/HBM memory subsystems, PCIe, CXL, and Ethernet. The work involves solving technical challenges in SoC architecture, security, RAS, and power-management features using tools like Portable Stimulus and emulation platforms.
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