ASIC Design Engineer

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$98,500–$147,700 / yr
Posted
32 days ago
Freshness
Confirmed live yesterday
Closes
Feb 6, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $123k
$83k most similar roles pay here $243k

This role pays less than 97% of similar roles. Most pay $162,000–$221,050 — the shaded band above. At the midpoint, this role pays about $123k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · ASIC Design Engineer

The ASIC Design Engineer joins the SoC and ASIC Design organization to contribute to projects involving high-performance computing, AI, mobile, automotive, data center, and next-generation semiconductor technologies. This role involves the architecture, design, implementation, integration, and optimization of ASIC, SoC, and IP solutions while ensuring performance, power, area, timing, and quality objectives are met. Day-to-day responsibilities include RTL design, static timing analysis, synthesis, verification, silicon bring-up, and developing automation frameworks to improve productivity. The candidate will utilize industry-standard tools and programming languages such as Python, Tcl, or Perl. Key technical domains include low-power design, multi-voltage domain work, IP integration, and system simulation. The role focuses on solving complex hardware challenges by applying silicon learnings to develop advanced products using cutting-edge process technologies for diverse computing environments.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

What you'll do

  • Participate in the architecture, design, implementation, integration, and optimization of ASIC, SoC, and IP solutions.
  • Develop and validate design solutions that meet performance, power, area, timing, and quality objectives.
  • Perform RTL design, static timing analysis, synthesis, and silicon bring-up activities based on project requirements.
  • Resolve complex design, implementation, and verification challenges using established ASIC engineering practices.
  • Develop and enhance design flows, automation frameworks, and engineering tools to improve productivity.
  • Apply silicon learnings and feedback to improve future designs, processes, and methodologies.
  • Provide technical expertise during design reviews to drive project execution and quality.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience in ASIC, FPGA, or SoC design and development.
  • Understanding of digital design fundamentals, computer architecture, and semiconductor development processes.
  • Experience with industry-standard ASIC design, implementation, verification, and/or timing analysis tools.
  • Programming or scripting experience with languages such as Python, Tcl, Perl, or similar.
  • Strong analytical, problem-solving, communication, and teamwork skills.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (preferred).
  • Experience in RTL design, timing analysis, high-performance computing, AI/ML accelerators, or silicon validation (preferred).

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